/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/ |
H A D | addition.cpp | 40 void addition::entry(){ function in class:addition
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/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/ |
H A D | subtract.cpp | 41 void subtraction::entry(){ function in class:subtraction
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/gem5/ext/systemc/src/sysc/kernel/ |
H A D | sc_phase_callback_registry.cpp | 59 : std::unary_function< sc_phase_callback_registry::entry, bool > 171 if( it != m_cb_vec.end() ) // update existing entry 178 else // new entry 183 entry new_entry = { &cb, new_mask };
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/gem5/src/dev/storage/ |
H A D | ide_disk.cc | 157 memset(&curPrd.entry, 0, sizeof(PrdEntry_t)); 344 DPRINTF(IdeDisk, "DMA Aborted before reading PRD entry\n"); 358 (uint8_t*)&curPrd.entry); 365 DPRINTF(IdeDisk, "DMA Aborted while reading PRD entry\n"); 1137 SERIALIZE_SCALAR(curPrd.entry.baseAddr); 1138 SERIALIZE_SCALAR(curPrd.entry.byteCount); 1139 SERIALIZE_SCALAR(curPrd.entry.endOfTable); 1190 UNSERIALIZE_SCALAR(curPrd.entry.baseAddr); 1191 UNSERIALIZE_SCALAR(curPrd.entry.byteCount); 1192 UNSERIALIZE_SCALAR(curPrd.entry [all...] |
/gem5/src/python/m5/ext/pyfdt/ |
H A D | pyfdt.py | 718 for entry in self.reserve_entries: 720 if entry['address']: 721 result += "%#x " % entry['address'] 724 if entry['size']: 725 result += "%#x" % entry['size'] 745 for entry in self.reserve_entries: 747 entry['address'], 748 entry['size'])
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/gem5/src/cpu/pred/ |
H A D | simple_indirect.cc | 118 HistoryEntry entry(br_addr, tgt_addr, seq_num); 119 threadInfo[tid].pathHist.push_back(entry); 206 // Did not find entry, random replacement
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/gem5/src/sim/ |
H A D | serialize.hh | 86 bool find(const std::string §ion, const std::string &entry, 89 bool findObj(const std::string §ion, const std::string &entry, 93 bool entryExists(const std::string §ion, const std::string &entry);
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/gem5/src/base/loader/ |
H A D | object_file.cc | 60 arch(_arch), opSys(_op_sys), entry(0), globalPtr(0),
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H A D | elf_object.cc | 213 // Record the size of each entry 294 entry = ehdr.e_entry; 569 // Patch the entry point with bias_addr. 570 entry += bias_addr;
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/gem5/src/arch/x86/ |
H A D | pagetable_walker.hh | 104 TlbEntry entry; member in class:X86ISA::Walker::WalkerState
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/gem5/configs/common/ |
H A D | cpu2000.py | 57 for entry in dirs: 58 newdir = joinpath(dstdir, root, entry) 62 for entry in files: 63 dest = normpath(joinpath(dstdir, root, entry)) 64 src = normpath(joinpath(srcdir, root, entry))
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/gem5/ext/systemc/src/sysc/utils/ |
H A D | sc_hash.h | 130 sc_phash_elem* entry; member in class:sc_core::sc_phash_base_iter 140 : table(t), entry(0), next(0), last(0), index(0) 143 : table(&t), entry(0), next(0), last(0), index(0)
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/gem5/src/systemc/tests/systemc/misc/stars/star108761/ |
H A D | star108761.cpp | 47 SC_CTHREAD(entry, clk.pos()); 52 void entry(); 1091 void test::entry() { function in class:test
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/gem5/src/arch/arm/ |
H A D | pmu.cc | 723 // single 64-bit entry (reg_pmceid). The register was extended in 742 auto entry = eventMap.find(eventId); local 744 if (entry == eventMap.end()) { 748 return entry->second;
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/gem5/src/dev/arm/ |
H A D | gic_v3_its.cc | 332 const auto entry = cmdDispatcher.find(cmd); local 333 return entry != cmdDispatcher.end() ? entry->second.name : "INVALID"; 377 const auto entry = cmdDispatcher.find(command.type); local 379 if (entry != cmdDispatcher.end()) { 381 entry->second.exec(this, yield, command);
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/gem5/src/mem/cache/ |
H A D | mshr.cc | 122 // an MSHR entry. If we do, set the downstreamPending 191 // an MSHR entry. If we find one, clear the 707 MSHR::conflictAddr(const QueueEntry* entry) const 710 return entry->matchBlockAddr(blkAddr, isSecure);
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H A D | mshr.hh | 124 /** True if the entry is just a simple forward from an upper level */ 537 bool conflictAddr(const QueueEntry* entry) const override;
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H A D | base.hh | 385 void markInService(WriteQueueEntry *entry) argument 388 writeBuffer.markInService(entry); 587 * Return the next queue entry to service, either a pending miss 1235 * send it out. This construct allows a queue entry to choose a suitable 1244 * Similar to sendMSHR, but for a write-queue entry 1246 * mark the entry in service. 1248 * @param wq_entry The write-queue entry to turn into a packet and send
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/gem5/ext/googletest/googletest/src/ |
H A D | gtest-port.cc | 157 struct procentry64 entry; local 159 int status = getprocs64(&entry, sizeof(entry), NULL, 0, &pid, 1); 161 return entry.pi_thcount;
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/gem5/src/arch/sparc/ |
H A D | faults.cc | 666 TlbEntry entry(p->pTable->pid(), alignedvaddr, pte->paddr, 670 // Insert the TLB entry. 671 // The entry specifying whether the address is "real" is set to 676 insert(alignedvaddr, partition_id, context_id, false, entry.pte); 753 TlbEntry entry(p->pTable->pid(), alignedvaddr, pte->paddr, 757 // Insert the TLB entry. 758 // The entry specifying whether the address is "real" is set to 763 insert(alignedvaddr, partition_id, context_id, false, entry.pte);
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/gem5/src/gpu-compute/ |
H A D | gpu_tlb.hh | 166 * the full capacity of the given set, grab an entry from 174 * contains the MRU TLB entry of the given set. If the freeList 235 TlbEntry *insert(Addr vpn, TlbEntry &entry); 338 * TLB entry to be populated and passed back and filled in
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/gem5/util/minorview/ |
H A D | view.py | 307 def time_set(self, entry): 309 <= the entry's time""" 310 newTime = self.model.find_time_index(int(entry.get_text()))
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/gem5/ext/systemc/src/sysc/qt/md/ |
H A D | ksr1.s | 60 # finop; beq.qt %rc, %rc, 24 # return value entry 62 # finop; movi8 0, %rc # no return value entry 72 # On entry: 90 finop ; cxnop # entry prefix 91 finop ; cxnop # entry prefix 279 finop ; cxnop # entry prefix 280 finop ; cxnop # entry prefix 376 finop ; cxnop # entry prefix 377 finop ; cxnop # entry prefix
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/gem5/ext/pybind11/include/pybind11/ |
H A D | stl.h | 76 for (auto entry : s) { 78 if (!conv.load(entry, convert))
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/gem5/util/streamline/ |
H A D | m5stats2streamline.py | 802 for entry in self.stats_list: 803 if entry.per_cpu: 805 regex_strings.append(entry.per_cpu_regex_string[i]) 807 regex_strings.append(entry.regex_string)
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