Searched refs:cxx_header (Results 26 - 50 of 197) sorted by relevance

12345678

/gem5/src/mem/cache/compressors/
H A DCompressors.py36 cxx_header = "mem/cache/compressors/base.hh" variable in class:BaseCacheCompressor
43 cxx_header = "mem/cache/compressors/bdi.hh" variable in class:BDI
52 cxx_header = "mem/cache/compressors/cpack.hh" variable in class:CPack
/gem5/src/mem/cache/replacement_policies/
H A DReplacementPolicies.py36 cxx_header = "mem/cache/replacement_policies/base.hh" variable in class:BaseReplacementPolicy
41 cxx_header = "mem/cache/replacement_policies/fifo_rp.hh" variable in class:FIFORP
46 cxx_header = "mem/cache/replacement_policies/second_chance_rp.hh" variable in class:SecondChanceRP
51 cxx_header = "mem/cache/replacement_policies/lfu_rp.hh" variable in class:LFURP
56 cxx_header = "mem/cache/replacement_policies/lru_rp.hh" variable in class:LRURP
61 cxx_header = "mem/cache/replacement_policies/bip_rp.hh" variable in class:BIPRP
70 cxx_header = "mem/cache/replacement_policies/mru_rp.hh" variable in class:MRURP
75 cxx_header = "mem/cache/replacement_policies/random_rp.hh" variable in class:RandomRP
80 cxx_header = "mem/cache/replacement_policies/brrip_rp.hh" variable in class:BRRIPRP
97 cxx_header variable in class:TreePLRURP
[all...]
/gem5/src/systemc/tlm_bridge/
H A DTlmBridge.py38 cxx_header = 'systemc/tlm_bridge/gem5_to_tlm.hh' variable in class:Gem5ToTlmBridgeBase
50 cxx_header = 'systemc/tlm_bridge/tlm_to_gem5.hh' variable in class:TlmToGem5BridgeBase
61 cxx_header = 'systemc/tlm_bridge/gem5_to_tlm.hh' variable in class:Gem5ToTlmBridge32
69 cxx_header = 'systemc/tlm_bridge/gem5_to_tlm.hh' variable in class:Gem5ToTlmBridge64
78 cxx_header = 'systemc/tlm_bridge/tlm_to_gem5.hh' variable in class:TlmToGem5Bridge32
86 cxx_header = 'systemc/tlm_bridge/tlm_to_gem5.hh' variable in class:TlmToGem5Bridge64
/gem5/src/sim/
H A DClockDomain.py47 cxx_header = "sim/clock_domain.hh" variable in class:ClockDomain
54 cxx_header = "sim/clock_domain.hh" variable in class:SrcClockDomain
79 cxx_header = "sim/clock_domain.hh" variable in class:DerivedClockDomain
H A DInstTracer.py36 cxx_header = "sim/insttracer.hh" variable in class:InstTracer
H A DVoltageDomain.py44 cxx_header = "sim/voltage_domain.hh" variable in class:VoltageDomain
/gem5/src/dev/storage/
H A DDiskImage.py34 cxx_header = "dev/storage/disk_image.hh" variable in class:DiskImage
40 cxx_header = "dev/storage/disk_image.hh" variable in class:RawDiskImage
44 cxx_header = "dev/storage/disk_image.hh" variable in class:CowDiskImage
/gem5/src/mem/cache/tags/indexing_policies/
H A DIndexingPolicies.py36 cxx_header = "mem/cache/tags/indexing_policies/base.hh" variable in class:BaseIndexingPolicy
50 cxx_header = "mem/cache/tags/indexing_policies/set_associative.hh" variable in class:SetAssociative
55 cxx_header = "mem/cache/tags/indexing_policies/skewed_associative.hh" variable in class:SkewedAssociative
/gem5/src/dev/arm/
H A DAbstractNVM.py46 cxx_header = "dev/arm/abstract_nvm.hh" variable in class:AbstractNVM
/gem5/src/cpu/kvm/
H A DKvmVM.py45 cxx_header = "cpu/kvm/vm.hh" variable in class:KvmVM
/gem5/src/sim/power/
H A DPowerModelState.py44 cxx_header = "sim/power/power_model.hh" variable in class:PowerModelState
H A DThermalDomain.py44 cxx_header = "sim/power/thermal_domain.hh" variable in class:ThermalDomain
/gem5/src/arch/sparc/
H A DSparcNativeTrace.py37 cxx_header = 'arch/sparc/nativetrace.hh' variable in class:SparcNativeTrace
/gem5/src/arch/x86/
H A DX86NativeTrace.py37 cxx_header = 'arch/x86/nativetrace.hh' variable in class:X86NativeTrace
/gem5/src/cpu/testers/traffic_gen/
H A DTrafficGen.py53 cxx_header = "cpu/testers/traffic_gen/traffic_gen.hh" variable in class:TrafficGen
/gem5/src/dev/
H A DBadDevice.py34 cxx_header = "dev/baddev.hh" variable in class:BadDevice
/gem5/src/dev/virtio/
H A DVirtIO9P.py47 cxx_header = 'dev/virtio/fs9p.hh' variable in class:VirtIO9PBase
56 cxx_header = 'dev/virtio/fs9p.hh' variable in class:VirtIO9PProxy
60 cxx_header = 'dev/virtio/fs9p.hh' variable in class:VirtIO9PDiod
68 cxx_header = 'dev/virtio/fs9p.hh' variable in class:VirtIO9PSocket
/gem5/src/dev/x86/
H A DI8237.py36 cxx_header = "dev/x86/i8237.hh" variable in class:I8237
/gem5/src/mem/ruby/structures/
H A DLRUReplacementPolicy.py39 cxx_header = 'mem/ruby/structures/LRUPolicy.hh' variable in class:LRUReplacementPolicy
/gem5/src/arch/arm/kvm/
H A DKvmGic.py45 cxx_header = "arch/arm/kvm/gic.hh" variable in class:MuxingKvmGic
H A DBaseArmKvmCPU.py43 cxx_header = "arch/arm/kvm/base_cpu.hh" variable in class:BaseArmKvmCPU
/gem5/src/arch/x86/bios/
H A DE820.py44 cxx_header = 'arch/x86/bios/e820.hh' variable in class:X86E820Entry
53 cxx_header = 'arch/x86/bios/e820.hh' variable in class:X86E820Table
/gem5/src/learning_gem5/part2/
H A DHelloObject.py35 cxx_header = "learning_gem5/part2/hello_object.hh" variable in class:HelloObject
45 cxx_header = "learning_gem5/part2/goodbye_object.hh" variable in class:GoodbyeObject
/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/
H A DSystemC_Example.py38 cxx_header = 'systemc_simple_object/printer.hh' variable in class:SystemC_Printer
49 cxx_header = 'systemc_simple_object/feeder.hh' variable in class:Gem5_Feeder
/gem5/src/arch/riscv/
H A DRiscvSystem.py39 cxx_header = 'arch/riscv/system.hh' variable in class:RiscvSystem
47 cxx_header = 'arch/riscv/bare_metal/system.hh' variable in class:BareMetalRiscvSystem

Completed in 16 milliseconds

12345678