Searched refs:counter (Results 26 - 43 of 43) sorted by relevance

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/gem5/src/mem/cache/prefetch/
H A Dirregular_stream_buffer.cc102 if (mapping_A.counter > 0 && mapping_B.counter > 0) {
105 mapping_B.counter++;
107 if (mapping_B.counter == 1) {
109 // counter at 1
114 mapping_B.counter--;
118 if (mapping_A.counter == 0) {
120 mapping_A.counter++;
126 mapping_B.counter.reset();
127 mapping_B.counter
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H A Dsignature_path.cc72 // pick the entry with the lowest counter value,
73 // then decrease the counter of all entries
80 if (entry.counter < current_counter) {
82 current_counter = entry.counter;
84 entry.counter--;
87 pstride_entry->counter.reset();
147 pstride_entry.counter++;
206 return entry.counter.calcSaturation();
213 double lookahead_confidence = lookahead.counter.calcSaturation();
270 // - select the entry with the highest counter a
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H A Dspatio_temporal_memory_streaming.cc71 if (seq_entry.counter > 0) {
152 // Reset last trigger counter
214 if (seq_entry.counter > 1) {
215 // 2-bit counter: high enough confidence with a
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt3.1/
H A Dmain.cpp40 #include "counter.h"
52 counter cnt("COUNTER", clk, found);
/gem5/src/dev/
H A Dintel_8254_timer.hh83 /** Event for counter interrupt */
88 Counter* counter; member in class:Intel8254Timer::Counter::CounterEvent
135 /** Output goes high when the counter reaches zero */
156 /** Get the current count for this counter */
179 * @param base The base name of the counter object.
186 * @param base The base name of the counter object.
201 Counter *counter[3]; member in class:Intel8254Timer
206 DPRINTF(Intel8254Timer, "Timer interrupt from counter %d.\n", num);
227 return counter[num]->read();
234 counter[nu
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/gem5/src/cpu/pred/
H A Dmultiperspective_perceptron.cc285 // xor in the imli counter(s) and/or recency position based on the masks
336 int counter = threadData[tid]->tables[i][hashed_idx]; local
342 xlat4[counter] : xlat[counter]);
366 MultiperspectivePerceptron::satIncDec(bool taken, bool &sign, int &counter, argument
373 if (counter == 0) {
376 counter -= 1;
380 if (counter < max_weight) {
381 counter += 1;
388 if (counter < max_weigh
423 int counter = tables[i][hashed_idx]; local
470 int counter = tables[i][hashed_idx]; local
504 int counter = tables[i][hashed_idx]; local
522 int counter = tables[i][hashed_idx]; local
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/gem5/src/arch/riscv/
H A Disa.hh70 bool hpmCounterEnabled(int counter) const;
/gem5/src/sim/
H A Dsim_events.cc153 CountedExitEvent::CountedExitEvent(const std::string &_cause, int &counter) argument
154 : Event(Sim_Exit_Pri), cause(_cause), downCounter(counter)
/gem5/src/mem/ruby/profiler/
H A DAddressProfiler.cc108 int counter = 0; local
110 while (counter < max && counter < records_printed) {
111 const AccessTraceForAddress* record = sorted[counter];
116 counter++;
121 while (counter < max) {
122 const AccessTraceForAddress* record = sorted[counter];
305 // record program counter address trace info
312 // all-instructions profiler record program counter address
/gem5/src/mem/ruby/common/
H A DNetDest.cc124 int counter = 0; local
126 counter += m_bits[i].count();
128 return counter;
/gem5/src/mem/ruby/network/simple/
H A DPerfectSwitch.cc116 for (int counter = 0; counter < m_in.size(); counter++) {
/gem5/ext/testlib/
H A Dlog.py52 counter = 0 variable in class:RecordTypeCounterMetaclass
54 cls.type_id = RecordTypeCounterMetaclass.counter
55 RecordTypeCounterMetaclass.counter += 1
/gem5/src/cpu/
H A Dbase.cc189 // when counter reaches 0
190 int *counter = new int; local
191 *counter = numThreads;
193 Event *event = new CountedExitEvent(cause, *counter);
216 // when counter reaches 0
217 int *counter = new int; local
218 *counter = numThreads;
220 Event *event = new CountedExitEvent(cause, *counter);
/gem5/ext/systemc/src/sysc/qt/md/
H A Dhppa_b.s100 addibf,<= -8,%arg0,_loop0 ; decrement counter by 8 and loop
138 addibf,<= -8,%arg0,_loop1 ; decrement counter by 8 and loop
167 addibf,<= -8,%arg0,_loop2 ; decrement counter by 8 and loop
192 addibf,<= -8,%arg0,_loop3 ; decrement counter by 8 and loop
/gem5/src/arch/arm/
H A Dpmu.cc82 /* Setup the performance counter ID registers */
87 // Setup the hard-coded cycle counter, which is equivalent to
88 // architected counter event type 0x11.
259 DPRINTF(PMUVerbose, "Setting counter type: "
412 DPRINTF(PMUVerbose, "PMU reset cycle counter to zero.\n");
458 for (auto& counter: userCounters) {
459 counter->add(val);
552 debugCounter("attempted to get value from a counter without"
567 debugCounter("attempted to set value from a counter without"
576 DPRINTF(PMUVerbose, "updateCounter(%i): Disabling counter\
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/gem5/ext/systemc/src/sysc/datatypes/fx/
H A Dscfx_rep.cpp1689 int counter;
1691 for( counter = div_wl; counter && ! remainder.is_zero(); counter -- )
1705 if( counter == 0 )
/gem5/src/systemc/dt/fx/
H A Dscfx_rep.cc1557 int counter;
1559 for (counter = div_wl; counter && !remainder.is_zero(); counter--) {
1571 if (counter == 0) {
/gem5/ext/pybind11/include/pybind11/
H A Dcast.h1414 int counter = 0;
1416 PyTuple_SET_ITEM(result.ptr(), counter++, entry.release().ptr());
1776 int counter = 0;
1778 PyTuple_SET_ITEM(result.ptr(), counter++, arg_value.release().ptr());

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