| /gem5/src/systemc/tests/systemc/misc/synth/wait_until/test13/ |
| H A D | test.h | 90 sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 test( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, sc_signal<int>& O1, sc_signal<int>& O2, sc_signal<int>& O3, sc_signal<int>& O4, sc_signal<int>& O5) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/wait_until/test14/ |
| H A D | monitor.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 monitor( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | tb.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 tb( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& RESET_SIG, sc_signal<int>& I1, sc_signal<int>& I2, sc_signal<int>& I3, sc_signal<int>& I4, sc_signal<int>& I5, sc_signal<bool>& CONT1, sc_signal<bool>& CONT2, sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | test.h | 90 sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 test( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, sc_signal<int>& O1, sc_signal<int>& O2, sc_signal<int>& O3, sc_signal<int>& O4, sc_signal<int>& O5) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/wait_until/test15/ |
| H A D | monitor.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 monitor( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | tb.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 tb( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& RESET_SIG, sc_signal<int>& I1, sc_signal<int>& I2, sc_signal<int>& I3, sc_signal<int>& I4, sc_signal<int>& I5, sc_signal<bool>& CONT1, sc_signal<bool>& CONT2, sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | test.h | 90 sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 test( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, sc_signal<int>& O1, sc_signal<int>& O2, sc_signal<int>& O3, sc_signal<int>& O4, sc_signal<int>& O5) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/wait_until/test16/ |
| H A D | monitor.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 monitor( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | tb.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 tb( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& RESET_SIG, sc_signal<int>& I1, sc_signal<int>& I2, sc_signal<int>& I3, sc_signal<int>& I4, sc_signal<int>& I5, sc_signal<bool>& CONT1, sc_signal<bool>& CONT2, sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | test.h | 90 sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 test( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, sc_signal<int>& O1, sc_signal<int>& O2, sc_signal<int>& O3, sc_signal<int>& O4, sc_signal<int>& O5) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/wait_until/test17/ |
| H A D | monitor.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 monitor( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | tb.h | 90 const sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 tb( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& RESET_SIG, sc_signal<int>& I1, sc_signal<int>& I2, sc_signal<int>& I3, sc_signal<int>& I4, sc_signal<int>& I5, sc_signal<bool>& CONT1, sc_signal<bool>& CONT2, sc_signal<bool>& CONT3, const sc_signal<int>& O1, const sc_signal<int>& O2, const sc_signal<int>& O3, const sc_signal<int>& O4, const sc_signal<int>& O5) argument
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| H A D | test.h | 90 sc_signal<int>& O2,
96 cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5)
73 test( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET_SIG, const sc_signal<int>& I1, const sc_signal<int>& I2, const sc_signal<int>& I3, const sc_signal<int>& I4, const sc_signal<int>& I5, const sc_signal<bool>& CONT1, const sc_signal<bool>& CONT2, const sc_signal<bool>& CONT3, sc_signal<int>& O1, sc_signal<int>& O2, sc_signal<int>& O3, sc_signal<int>& O4, sc_signal<int>& O5) argument
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| /gem5/util/m5/ |
| H A D | Makefile.alpha | 38 CFLAGS=-O2 -I../../include
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| H A D | Makefile.sparc | 38 CFLAGS=-O2 -m64 -I../../include
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| H A D | Makefile.thumb | 52 #CFLAGS=-O2 -march=armv7 -mthumb -I../../include
53 CFLAGS=-O2 -mthumb -I../../include
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| H A D | Makefile.x86 | 34 CFLAGS?=-O2 -DM5OP_ADDR=0xFFFF0000 -I../../include
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| H A D | Makefile.arm | 57 CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux \
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| H A D | Makefile.aarch64 | 57 CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux \
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| /gem5/ext/sst/ |
| H A D | Makefile | 6 CXXFLAGS=-std=c++0x -g -O2 -fPIC ${shell pkg-config ${SST_VERSION} --cflags} ${shell python-config --includes} -I../../build/ARM
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| /gem5/util/statetrace/arch/sparc/ |
| H A D | tracechild.hh | 55 O0, O1, O2, O3, O4, O5, O6, O7, enumerator in enum:SparcTraceChild::RegNum
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| H A D | tracechild.cc | 92 case SparcTraceChild::O2: return myregs.r_o2;
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