Searched hist:9913 (Results 1 - 10 of 10) sorted by relevance
| /gem5/src/arch/power/insts/ | ||
| H A D | static_inst.cc | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| /gem5/src/cpu/ | ||
| H A D | reg_class.cc | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| H A D | reg_class.hh | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| H A D | SConscript | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| /gem5/src/arch/x86/insts/ | ||
| H A D | static_inst.cc | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| /gem5/src/arch/arm/insts/ | ||
| H A D | misc.cc | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| H A D | static_inst.cc | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| /gem5/src/cpu/checker/ | ||
| H A D | cpu_impl.hh | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| /gem5/src/cpu/o3/ | ||
| H A D | dyn_inst.hh | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
| H A D | rename_impl.hh | 9913:7f43babfde6a Tue Oct 15 14:22:00 EDT 2013 Steve Reinhardt <steve.reinhardt@amd.com> cpu: clean up architectural register classification Move from a poorly documented scheme where the mapping of unified architectural register indices to register classes is hardcoded all over to one where there's an enum for the register classes and a function that encapsulates the mapping. |
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