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/gem5/src/cpu/testers/traffic_gen/
H A DBaseTrafficGen.py14053:9267d4f16524 Mon Jan 28 15:57:00 EST 2019 Tiago Muck <tiago.muck@arm.com> cpu: TrafficGen as BaseCPU

TrafficGen has additional attributes to behave like a BaseCPU. Python
scripts that expect sim. objects derived from BaseCPU can now be used with
TrafficGen without additional modifications.

Change-Id: Iee848b2ba0ac1851c487b1003da9bd96253d291a
Signed-off-by: Tiago Muck <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18416
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
/gem5/configs/example/
H A Dmemtest.py9267:f8c85a7d109f Thu Sep 27 08:59:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Configs: Fix memtest cache latency to match new parameters

This patch changes the memtest config to use the new response latency
of the cache model.

Completed in 17 milliseconds