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/gem5/src/arch/arm/isa/formats/
H A Dmisc.isa7264:fc3dfbfb3066 Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Warn about and ignore accesses to DCCISW.

This register is supposed to "Clean and invalidate data or unified cache line
by set/way." Since there isn't a good way to do that, we'll just ignore these
and warn about it.
/gem5/src/arch/arm/
H A Dmiscregs.hh7264:fc3dfbfb3066 Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Warn about and ignore accesses to DCCISW.

This register is supposed to "Clean and invalidate data or unified cache line
by set/way." Since there isn't a good way to do that, we'll just ignore these
and warn about it.

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