Searched hist:67 (Results 1 - 25 of 184) sorted by relevance

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/gem5/src/arch/x86/isa/insts/general_purpose/flags/
H A Dset_and_clear.py5448:67c8b7badec1 Thu Jun 12 00:58:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement and hook up STI and CLI instructions.
/gem5/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MESI_Two_Level/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_token/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_hammer/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby-MOESI_CMP_directory/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/src/mem/ruby/common/
H A DWriteMask.hh11325:67cc559d513a Sat Feb 06 20:21:00 EST 2016 Steve Reinhardt <steve.reinhardt@amd.com> style: eliminate explicit boolean comparisons

Result of running 'hg m5style --skip-all --fix-control -a' to get
rid of '== true' comparisons, plus trivial manual edits to get
rid of '== false'/'== False' comparisons.

Left a couple of explicit comparisons in where they didn't seem
unreasonable:
invalid boolean comparison in src/arch/mips/interrupts.cc:155
>> DPRINTF(Interrupt, "Interrupts OnCpuTimerINterrupt(tc) == true\n");<<
invalid boolean comparison in src/unittest/unittest.hh:110
>> "EXPECT_FALSE(" #expr ")", (expr) == false)<<
/gem5/tests/quick/se/60.gpu-randomtest/ref/x86/linux/gpu-randomtest-ruby-GPU_RfO/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/src/mem/slicc/ast/
H A DOperatorExprAST.py9692:67d9da312ef0 Tue May 21 12:31:00 EDT 2013 Nilay Vaish <nilay@cs.wisc.edu>, Malek Musleh <malek.musleh@gmail.com> ruby: add stats to .sm files, remove cache profiler
This patch changes the way cache statistics are collected in ruby.

As of now, there is separate entity called CacheProfiler which holds
statistical variables for caches. The CacheMemory class defines different
functions for accessing the CacheProfiler. These functions are then invoked
in the .sm files. I find this approach opaque and prone to error. Secondly,
we probably should not be paying the cost of a function call for recording
statistics.

Instead, this patch allows for accessing statistical variables in the
.sm files. The collection would become transparent. Secondly, it would happen
in place, so no function calls. The patch also removes the CacheProfiler class.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64a/minor-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64a/simple-timing-ruby/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64d/minor-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64d/simple-timing-ruby/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64f/minor-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64f/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64f/simple-timing-ruby/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/simple-timing-ruby/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/60.rubytest/ref/null/none/rubytest-ruby/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/00.hello/ref/riscv/linux/o3-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/00.hello/ref/riscv/linux/minor-timing/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/tests/quick/se/00.hello/ref/riscv/linux/simple-timing-ruby/
H A Dstats.txt11860:67dee11badea Sun Feb 19 05:30:00 EST 2017 Andreas Hansson <andreas.hansson@arm.com> stats: Get all stats updated to reflect current behaviour

Line everything up again.
/gem5/configs/dist/
H A Dsw.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
/gem5/configs/topologies/
H A DMesh_westfirst.py13731:67cd980cb20f Sat Jan 26 05:57:00 EST 2019 Andreas Sandberg <andreas.sandberg@arm.com> configs: Fix Python 3 iterator and exec compatibility issues

Python 2.7 used to return lists for operations such as map and range,
this has changed in Python 3. To make the configs Python 3 compliant,
add explicit conversions from iterators to lists where needed, replace
xrange with range, and fix changes to exec syntax.

This change doesn't fix import paths since that might require us to
restructure the configs slightly.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16002
Reviewed-by: Gabe Black <gabeblack@google.com>
/gem5/src/mem/slicc/symbols/
H A DTransition.py11325:67cc559d513a Sat Feb 06 20:21:00 EST 2016 Steve Reinhardt <steve.reinhardt@amd.com> style: eliminate explicit boolean comparisons

Result of running 'hg m5style --skip-all --fix-control -a' to get
rid of '== true' comparisons, plus trivial manual edits to get
rid of '== false'/'== False' comparisons.

Left a couple of explicit comparisons in where they didn't seem
unreasonable:
invalid boolean comparison in src/arch/mips/interrupts.cc:155
>> DPRINTF(Interrupt, "Interrupts OnCpuTimerINterrupt(tc) == true\n");<<
invalid boolean comparison in src/unittest/unittest.hh:110
>> "EXPECT_FALSE(" #expr ")", (expr) == false)<<

Completed in 54 milliseconds

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