Searched hist:6696 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/x86/isa/insts/simd128/integer/data_transfer/ | ||
| H A D | move.py | 6696:e533bec78924 Wed Oct 21 13:40:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> Implement X86 sse2 movdqu and movdqa instructions The movdqa instruction should enforce 16-byte alignment. This implementation does not do that. These instructions are needed for most of x86_64 spec2k to run. |
| /gem5/src/arch/x86/isa/decoder/ | ||
| H A D | two_byte_opcodes.isa | 6696:e533bec78924 Wed Oct 21 13:40:00 EDT 2009 Vince Weaver <vince@csl.cornell.edu> Implement X86 sse2 movdqu and movdqa instructions The movdqa instruction should enforce 16-byte alignment. This implementation does not do that. These instructions are needed for most of x86_64 spec2k to run. |
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