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/gem5/ext/mcpat/cacti/
H A Dwire.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dwire.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
/gem5/ext/mcpat/
H A Dcore.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dcore.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dinterconnect.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dinterconnect.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Diocontrollers.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Diocontrollers.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dlogic.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dlogic.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dmain.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dmemoryctrl.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dmemoryctrl.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dnoc.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A Dnoc.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A DxmlParser.cc10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
H A DxmlParser.h10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source

this patch adds the source for mcpat, a power, area, and timing modeling
framework.
/gem5/src/arch/arm/
H A Dnativetrace.hh6398:7a94cba72e02 Mon Jul 27 03:52:00 EDT 2009 Gabe Black <gblack@eecs.umich.edu> ARM: Make native trace only print when registers are changing value.
When registers have incorrect values but aren't actively changing, it's likely
they're not being modified at all. The fact that they're still wrong isn't
very important.
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/
H A Dadd_and_subtract.py8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
H A Dincrement_and_decrement.py8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/
H A Dxchg.py8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
/gem5/src/arch/x86/isa/insts/general_purpose/
H A Dlogical.py8610:9bdd52a2214c Thu Nov 03 23:52:00 EDT 2011 Nilay Vaish<nilay@cs.wisc.edu> x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
/gem5/src/mem/slicc/symbols/
H A DVar.py9219:258753d3bc47 Wed Sep 12 15:52:00 EDT 2012 Jason Power <power.jg@gmail.com> Ruby: Modify Scons so that we can put .sm files in extras
Also allows for header files which are required in slicc generated
code to be in a directory other than src/mem/ruby/slicc_interface.
/gem5/ext/dramsim2/
H A DSConscript11294:a368064a2ab5 Mon Jan 11 05:52:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> scons: Enable -Wextra by default

Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.
/gem5/ext/nomali/
H A DSConscript11294:a368064a2ab5 Mon Jan 11 05:52:00 EST 2016 Andreas Hansson <andreas.hansson@arm.com> scons: Enable -Wextra by default

Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.

Completed in 67 milliseconds

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