Searched hist:3840 (Results 1 - 2 of 2) sorted by relevance
/gem5/src/sim/ | ||
H A D | clocked_object.cc | 12089:ab37c4e77c49 Tue Jun 20 12:01:00 EDT 2017 Jason Lowe-Power <jason@lowepower.com> sim: Updated ClockedObject power state warning To prevent this warning from printing for *every* simulation, this patch adds a check to only print the warning if we are not at the beginning of simulation. Change-Id: I7f6154f0ca26bef6280f909f799aa1c7936b624a Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/3840 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/cpu/ | ||
H A D | exetrace.cc | 3840:5f8deb240569 Fri Dec 15 13:05:00 EST 2006 Lisa Hsu <hsul@eecs.umich.edu> some small general fixes to make everythign work nicely with other ISAs, now we can merge back with newmem. exetrace.cc: wrap this variable between FULL_SYSTEM #ifs mmaped_ipr.hh: fix for build miscregfile.cc: fixes for HPSTATE access during SE mode src/arch/sparc/miscregfile.cc: fixes for HPSTATE access during SE mode src/arch/mips/mmaped_ipr.hh: fix for build src/cpu/exetrace.cc: wrap this variable between FULL_SYSTEM #ifs |
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