Searched hist:3661 (Results 1 - 6 of 6) sorted by relevance
/gem5/src/arch/arm/kvm/ | ||
H A D | gic.cc | 12112:30b742d6e1e8 Wed Apr 26 11:21:00 EDT 2017 Curtis Dunham <Curtis.Dunham@arm.com> kvm, arm: don't create interrupt events while saving GIC state If an interrupt was pending according to Kvm state during a drain, the Pl390 model would create an interrupt event that could not be serviced, preventing the system from draining. The proper behavior is for the Pl390 not actively being used for simulation to just skip the GIC state machine that delivers interrupts. Change-Id: Icb37e7e992f1fb441a9b3a26daa1bb5a6fe19228 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3661 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
H A D | gic.hh | 12112:30b742d6e1e8 Wed Apr 26 11:21:00 EDT 2017 Curtis Dunham <Curtis.Dunham@arm.com> kvm, arm: don't create interrupt events while saving GIC state If an interrupt was pending according to Kvm state during a drain, the Pl390 model would create an interrupt event that could not be serviced, preventing the system from draining. The proper behavior is for the Pl390 not actively being used for simulation to just skip the GIC state machine that delivers interrupts. Change-Id: Icb37e7e992f1fb441a9b3a26daa1bb5a6fe19228 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3661 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
/gem5/src/cpu/ | ||
H A D | base.cc | 3661:efc80a01aeb6 Tue Nov 14 01:10:00 EST 2006 Ron Dreslinski <rdreslin@umich.edu> Make cpu's capable of having a phase shift |
H A D | base.hh | 3661:efc80a01aeb6 Tue Nov 14 01:10:00 EST 2006 Ron Dreslinski <rdreslin@umich.edu> Make cpu's capable of having a phase shift |
/gem5/src/cpu/simple/ | ||
H A D | timing.cc | 3661:efc80a01aeb6 Tue Nov 14 01:10:00 EST 2006 Ron Dreslinski <rdreslin@umich.edu> Make cpu's capable of having a phase shift |
H A D | atomic.cc | 3661:efc80a01aeb6 Tue Nov 14 01:10:00 EST 2006 Ron Dreslinski <rdreslin@umich.edu> Make cpu's capable of having a phase shift |
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