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/gem5/src/sim/
H A Dsyscall_desc.cc11994:211df6a05c5e Tue May 02 13:56:00 EDT 2017 Alexandru Dutu <alexandru.dutu@amd.com> syscall_emul: Argument retrieval bug fix

This commit fixes a stack-buffer underflow
by fixing the way the array is indexed.

Change-Id: I44400e2b99a2f8e1f48f673cd110b9dcd6480a72
Reviewed-on: https://gem5-review.googlesource.com/3040
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
/gem5/tests/configs/
H A Dsimple-atomic.py3040:1fbdad0df45e Fri Aug 18 00:16:00 EDT 2006 Steve Reinhardt <stever@eecs.umich.edu> Add caches in, fix cpu.mem param
H A Dsimple-timing.py3040:1fbdad0df45e Fri Aug 18 00:16:00 EDT 2006 Steve Reinhardt <stever@eecs.umich.edu> Add caches in, fix cpu.mem param
H A Dtsunami-simple-atomic-dual.py3040:1fbdad0df45e Fri Aug 18 00:16:00 EDT 2006 Steve Reinhardt <stever@eecs.umich.edu> Add caches in, fix cpu.mem param
H A Dtsunami-simple-atomic.py3040:1fbdad0df45e Fri Aug 18 00:16:00 EDT 2006 Steve Reinhardt <stever@eecs.umich.edu> Add caches in, fix cpu.mem param
H A Dtsunami-simple-timing.py3040:1fbdad0df45e Fri Aug 18 00:16:00 EDT 2006 Steve Reinhardt <stever@eecs.umich.edu> Add caches in, fix cpu.mem param
H A Dtsunami-simple-timing-dual.py3040:1fbdad0df45e Fri Aug 18 00:16:00 EDT 2006 Steve Reinhardt <stever@eecs.umich.edu> Add caches in, fix cpu.mem param

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