Searched hist:2014 (Results 251 - 275 of 1681) sorted by relevance
/gem5/ext/mcpat/regression/test-8/ | ||
H A D | region0.out.ref | 10235:0db28826e333 Wed Jun 04 10:48:00 EDT 2014 Yasuko Eckert <yasuko.eckert@amd.com> ext: Add a McPAT regression tester Add a regression tester to McPAT. Joel Hestness wrote these tests and Yasuko Eckert modified them to reflect the new McPAT interface and other changes the previous patch made. |
/gem5/src/arch/arm/ | ||
H A D | ccregs.hh | 10338:8bee5f4edb92 Tue Apr 29 17:05:00 EDT 2014 Curtis Dunham <Curtis.Dunham@arm.com> arm: use condition code registers for ARM ISA Analogous to ee049bf (for x86). Requires a bump of the checkpoint version and corresponding upgrader code to move the condition code register values to the new register file. |
/gem5/src/arch/generic/ | ||
H A D | pseudo_inst.hh | 10553:c1ad57c53a36 Sun Nov 23 21:01:00 EST 2014 Alexandru Dutu <alexandru.dutu@amd.com> kvm, x86: Adding support for SE mode execution This patch adds methods in KvmCPU model to handle KVM exits caused by syscall instructions and page faults. These types of exits will be encountered if KvmCPU is run in SE mode. |
/gem5/src/arch/x86/ | ||
H A D | ldstflags.hh | 10467:dcf27c8220ac Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch,x86,mem: Dynamically determine the ISA for Ruby store check This patch makes the memory system ISA-agnostic by enabling the Ruby Sequencer to dynamically determine if it has to do a store check. To enable this check, the ISA is encoded as an enum, and the system is able to provide the ISA to the Sequencer at run time. |
H A D | pseudo_inst.hh | 10553:c1ad57c53a36 Sun Nov 23 21:01:00 EST 2014 Alexandru Dutu <alexandru.dutu@amd.com> kvm, x86: Adding support for SE mode execution This patch adds methods in KvmCPU model to handle KVM exits caused by syscall instructions and page faults. These types of exits will be encountered if KvmCPU is run in SE mode. |
/gem5/tests/test-progs/mwait/ | ||
H A D | Makefile | 10528:a69d27a14460 Thu Nov 06 06:42:00 EST 2014 Marc Orr <morr@cs.wisc.edu> tests: A test program for the new mwait implementation. This is a simple test program for the new mwait implemenation. It is uses m5threads to create to threads of execution in syscall emulation mode that interact using the mwait instruction. Committed by: Nilay Vaish <nilay@cs.wisc.edu> |
/gem5/util/ | ||
H A D | on-chip-network-power-area.py | 10449:f4ff359c61ff Sat Oct 11 17:16:00 EDT 2014 Nilay Vaish <nilay@cs.wisc.edu> util: adds a script for using DSENT This patch adds a python script that processes the configuration and the statistics file from a simulation run. Configuration and activity of network routers and links obtained from this processing is fed to DSENT via its Python interface. DSENT then computes the area and the power consumption of these network components. The script outputs these quantities to the console. |
H A D | valgrind-suppressions | 10179:e30d66a1e550 Wed Apr 23 05:18:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> util: Valgrind suppression addition Adds a suppression rule to util/valgrind-suppressions due to a minor bug present in zlib that has no impact on simulation. |
/gem5/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/ | ||
H A D | system.pc.com_1.terminal | 10526:0068ad93a67e Thu Nov 06 06:42:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to changes to ruby 10451:3a87241adfb8 Sat Oct 11 17:18:00 EDT 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to changes to x86, stale configs. 10091:d76312a74915 Sun Feb 23 20:16:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to changes to ruby pio access handling 10007:94d286db85c1 Sat Jan 04 01:03:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> ruby: rename MESI_CMP_directory to MESI_Two_Level This is because the next patch introduces a three level hierarchy. |
H A D | simout | 10315:9e02c14446bb Mon Sep 01 17:55:00 EDT 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent ruby and x86 changes Also updates many out of date config files. 10091:d76312a74915 Sun Feb 23 20:16:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to changes to ruby pio access handling 10036:80e84beef3bb Fri Jan 24 16:29:00 EST 2014 Ali Saidi <Ali.Saidi@ARM.com> stats: update stats for cache occupancy and clock domain changes 10007:94d286db85c1 Sat Jan 04 01:03:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> ruby: rename MESI_CMP_directory to MESI_Two_Level This is because the next patch introduces a three level hierarchy. |
H A D | stats.txt | 10628:c9b7e0c69f88 Tue Dec 23 09:31:00 EST 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller. 10560:dd04eb06ad42 Mon Nov 24 09:03:00 EST 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Bump stats after static analysis fixes Fixing up the uninitialised values changes two of the x86 Linux boot regressions slightly. 10526:0068ad93a67e Thu Nov 06 06:42:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to changes to ruby 10451:3a87241adfb8 Sat Oct 11 17:18:00 EDT 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to changes to x86, stale configs. 10433:821cbe4a183b Thu Oct 09 17:52:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Add DRAM power statistics to reference output 10409:8c80b91944c5 Sat Sep 20 17:18:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Bump stats for filter, crossbar and config changes This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs. 10315:9e02c14446bb Mon Sep 01 17:55:00 EDT 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent ruby and x86 changes Also updates many out of date config files. 10229:aae7735450a9 Fri May 23 07:07:00 EDT 2014 Nilay Vaish <nilay@cs.wisc.edu> stats: changes due to o3 cpu and ruby message buffer patches 10220:9eab5efc02e8 Fri May 09 18:58:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Bump stats for the fixes, and mostly DRAM controller changes 10148:4574d5882066 Sun Mar 23 11:12:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats for DRAM changes This patch updates the stats to reflect the changes to the DRAM controller. |
H A D | simerr | 10036:80e84beef3bb Fri Jan 24 16:29:00 EST 2014 Ali Saidi <Ali.Saidi@ARM.com> stats: update stats for cache occupancy and clock domain changes 10007:94d286db85c1 Sat Jan 04 01:03:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> ruby: rename MESI_CMP_directory to MESI_Two_Level This is because the next patch introduces a three level hierarchy. |
/gem5/src/arch/x86/isa/insts/x87/arithmetic/ | ||
H A D | addition.py | 10474:799c8ee4ecba Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch: Use shared_ptr for all Faults This patch takes quite a large step in transitioning from the ad-hoc RefCountingPtr to the c++11 shared_ptr by adopting its use for all Faults. There are no changes in behaviour, and the code modifications are mostly just replacing "new" with "make_shared". 10044:42e058cae3d0 Mon Jan 27 19:50:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 add/sub instructions |
H A D | subtraction.py | 10474:799c8ee4ecba Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch: Use shared_ptr for all Faults This patch takes quite a large step in transitioning from the ad-hoc RefCountingPtr to the c++11 shared_ptr by adopting its use for all Faults. There are no changes in behaviour, and the code modifications are mostly just replacing "new" with "make_shared". 10044:42e058cae3d0 Mon Jan 27 19:50:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 add/sub instructions |
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/ | ||
H A D | exchange.py | 10474:799c8ee4ecba Thu Oct 16 05:49:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch: Use shared_ptr for all Faults This patch takes quite a large step in transitioning from the ad-hoc RefCountingPtr to the c++11 shared_ptr by adopting its use for all Faults. There are no changes in behaviour, and the code modifications are mostly just replacing "new" with "make_shared". 10043:301f2c0b3423 Mon Jan 27 19:50:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> x86: implements fxch instruction. |
/gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/ | ||
H A D | system.terminal | 10513:ca4438b6e39a Thu Oct 30 00:18:00 EDT 2014 Ali Saidi <Ali.Saidi@ARM.com> tests: Update regressions for the new kernels and various preceeding fixes. 10260:384d554cea8c Wed Jul 23 17:09:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> cpu: Minor CPU add regression tests for ARM and ALPHA This patch adds regression tests results and test harnesses for the Minor CPU on ARM and ALPHA. |
/gem5/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/ | ||
H A D | simout | 10513:ca4438b6e39a Thu Oct 30 00:18:00 EDT 2014 Ali Saidi <Ali.Saidi@ARM.com> tests: Update regressions for the new kernels and various preceeding fixes. 10260:384d554cea8c Wed Jul 23 17:09:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> cpu: Minor CPU add regression tests for ARM and ALPHA This patch adds regression tests results and test harnesses for the Minor CPU on ARM and ALPHA. |
/gem5/src/arch/power/ | ||
H A D | stacktrace.cc | 10417:710ee116eb68 Sat Sep 27 09:08:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> arch: Use const StaticInstPtr references where possible This patch optimises the passing of StaticInstPtr by avoiding copying the reference-counting pointer. This avoids first incrementing and then decrementing the reference-counting pointer. 10279:faa9dfc465ef Wed Aug 13 06:57:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> power: Remove unused private members to fix compile-time warning Certain versions of clang complain about unused private members if they are not used. This changeset removes such members from the POWER-specific ProcessInfo struct to silence the warning. |
/gem5/src/sim/ | ||
H A D | init_signals.hh | 10453:d0365cc3d05f Thu Oct 16 05:49:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> config: Add a --without-python option to build process Add the ability to build libgem5 without embedded Python or the ability to configure with Python. This is a prelude to a patch to allow config.ini files to be loaded into libgem5 using only C++ which would make embedding gem5 within other simulation systems easier. This adds a few registration interfaces to things which cross between Python and C++. Namely: stats dumping and SimObject resolving |
H A D | py_interact.hh | 10453:d0365cc3d05f Thu Oct 16 05:49:00 EDT 2014 Andrew Bardsley <Andrew.Bardsley@arm.com> config: Add a --without-python option to build process Add the ability to build libgem5 without embedded Python or the ability to configure with Python. This is a prelude to a patch to allow config.ini files to be loaded into libgem5 using only C++ which would make embedding gem5 within other simulation systems easier. This adds a few registration interfaces to things which cross between Python and C++. Namely: stats dumping and SimObject resolving |
/gem5/build_opts/ | ||
H A D | ALPHA_MOESI_CMP_directory | 10350:35241e33c38f Wed Sep 03 07:42:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> alpha: Stop using 'inorder' and rely entirely on 'minor' This patch avoids building the 'inorder' CPU model for any permutation of ALPHA, and also removes the ALPHA regressions using the 'inorder' CPU. The 'minor' CPU is already providing a broader test coverage. |
H A D | ALPHA_MOESI_CMP_token | 10350:35241e33c38f Wed Sep 03 07:42:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> alpha: Stop using 'inorder' and rely entirely on 'minor' This patch avoids building the 'inorder' CPU model for any permutation of ALPHA, and also removes the ALPHA regressions using the 'inorder' CPU. The 'minor' CPU is already providing a broader test coverage. |
H A D | ALPHA_MOESI_hammer | 10350:35241e33c38f Wed Sep 03 07:42:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> alpha: Stop using 'inorder' and rely entirely on 'minor' This patch avoids building the 'inorder' CPU model for any permutation of ALPHA, and also removes the ALPHA regressions using the 'inorder' CPU. The 'minor' CPU is already providing a broader test coverage. |
/gem5/ext/dnet/ | ||
H A D | os.h | 10271:0edd36ea6130 Wed Aug 13 06:57:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> ext: clang fix for flexible array members Changes how flexible array members are defined so clang does not error out during compilation. |
/gem5/ext/mcpat/ | ||
H A D | mcpat.mk | 10234:5cb711fa6176 Tue Jun 03 16:32:00 EDT 2014 Yasuko Eckert <yasuko.eckert@amd.com> ext: McPAT interface changes and fixes This patch includes software engineering changes and some generic bug fixes Joel Hestness and Yasuko Eckert made to McPAT 0.8. There are still known issues/concernts we did not have a chance to address in this patch. High-level changes in this patch include: 1) Making XML parsing modular and hierarchical: - Shift parsing responsibility into the components - Read XML in a (mostly) context-free recursive manner so that McPAT input files can contain arbitrary component hierarchies 2) Making power, energy, and area calculations a hierarchical and recursive process - Components track their subcomponents and recursively call compute functions in stages - Make C++ object hierarchy reflect inheritance of classes of components with similar structures - Simplify computeArea() and computeEnergy() functions to eliminate successive calls to calculate separate TDP vs. runtime energy - Remove Processor component (now unnecessary) and introduce a more abstract System component 3) Standardizing McPAT output across all components - Use a single, common data structure for storing and printing McPAT output - Recursively call print functions through component hierarchy 4) For caches, allow splitting data array and tag array reads and writes for better accuracy 5) Improving the usability of CACTI by printing more helpful warning and error messages 6) Minor: Impose more rigorous code style for clarity (more work still to be done) Overall, these changes greatly reduce the amount of replicated code, and they improve McPAT runtime and decrease memory footprint. 10233:648ea04db2ab Tue Jun 03 16:32:00 EDT 2014 Yasuko Eckert <yasuko.eckert@amd.com> ext: change McPAT to not force compile in 32-bit mode. 10232:ae97cd1bad82 Tue Jun 03 16:32:00 EDT 2014 Yasuko Eckert <yasuko.eckert@amd.com> ext: Redirect McPAT object files All object files and McPAT binaries are moved to directory gem5/build/mcpat/ rather than creating them locally. 10152:52c552138ba1 Tue Apr 01 00:44:00 EDT 2014 Anthony Gutierrez <atgutier@umich.edu> ext: add McPAT source this patch adds the source for mcpat, a power, area, and timing modeling framework. |
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