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H A Dgic_v3_cpu_interface.cc14236:5d24c3de4262 Tue Aug 20 08:53:00 EDT 2019 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Add GICv3 unimplemented Hyp Active Priorities Group regs

ICH_APxR1, ICH_APxR2, ICH_APxR3 are implemented only if supporting more
than 6 bits of priority. Since this is not the case, they are currently
unimplemented.
According to spec, unimplemented registers are RAZ/WI.

Change-Id: Ifd7f7a3d42b4575c2f7aff3b95d5a47ac1e61842
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20619
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

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