Searched hist:13120 (Results 1 - 5 of 5) sorted by relevance
| /gem5/src/arch/arm/isa/insts/ | ||
| H A D | fp64.isa | 13120:690a0db8e58b Thu Jun 28 09:32:00 EDT 2018 Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> arch-arm: Add FP16 support introduced by Armv8.2-A This changeset adds support for FP/SIMD instructions with half-precision floating-point operands. Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13084 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | neon64.isa | 13120:690a0db8e58b Thu Jun 28 09:32:00 EDT 2018 Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> arch-arm: Add FP16 support introduced by Armv8.2-A This changeset adds support for FP/SIMD instructions with half-precision floating-point operands. Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13084 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/arch/arm/insts/ | ||
| H A D | pred_inst.hh | 13120:690a0db8e58b Thu Jun 28 09:32:00 EDT 2018 Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> arch-arm: Add FP16 support introduced by Armv8.2-A This changeset adds support for FP/SIMD instructions with half-precision floating-point operands. Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13084 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/arch/arm/isa/formats/ | ||
| H A D | fp.isa | 13120:690a0db8e58b Thu Jun 28 09:32:00 EDT 2018 Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> arch-arm: Add FP16 support introduced by Armv8.2-A This changeset adds support for FP/SIMD instructions with half-precision floating-point operands. Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13084 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | aarch64.isa | 13120:690a0db8e58b Thu Jun 28 09:32:00 EDT 2018 Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> arch-arm: Add FP16 support introduced by Armv8.2-A This changeset adds support for FP/SIMD instructions with half-precision floating-point operands. Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/13084 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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