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| /gem5/src/dev/arm/ | ||
| H A D | gic_v2.hh | 13111:74ef47d9c035 Tue Sep 11 08:21:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Create postFiq events for GICv2 GICv2 is signaling IRQs only to the CPU. This patch is adding the capability of scheduling FIQs. Change-Id: I395afc83eb8d58cfd32cd93372bcb6f804364ef5 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12947 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | gic_v2.cc | 13111:74ef47d9c035 Tue Sep 11 08:21:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Create postFiq events for GICv2 GICv2 is signaling IRQs only to the CPU. This patch is adding the capability of scheduling FIQs. Change-Id: I395afc83eb8d58cfd32cd93372bcb6f804364ef5 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12947 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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