Searched hist:13 (Results 26 - 50 of 1864) sorted by relevance
/gem5/src/dev/x86/ | ||
H A D | south_bridge.hh | 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
/gem5/configs/boot/ | ||
H A D | netperf-stream-udp-client.rcS | 4418:aaa5828991b3 Mon Apr 30 13:08:00 EDT 2007 Ali Saidi <saidi@eecs.umich.edu> add a udp stream benchmark and a udp loopback benchmark |
/gem5/ext/dnet/ | ||
H A D | os.h | 10271:0edd36ea6130 Wed Aug 13 06:57:00 EDT 2014 Mitch Hayenga <mitch.hayenga@arm.com> ext: clang fix for flexible array members Changes how flexible array members are defined so clang does not error out during compilation. |
/gem5/ext/libelf/ | ||
H A D | _libelf.h | 8349:931ef19535e0 Mon Jun 13 02:51:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> LibElf: Build the error management code in libelf. This change makes some minor changes to get the error management code in libelf to build on Linux and to build it into the library. |
H A D | elf_errmsg.c | 8349:931ef19535e0 Mon Jun 13 02:51:00 EDT 2011 Gabe Black <gblack@eecs.umich.edu> LibElf: Build the error management code in libelf. This change makes some minor changes to get the error management code in libelf to build on Linux and to build it into the library. |
/gem5/src/arch/null/ | ||
H A D | SConscript | 9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. |
H A D | SConsopts | 9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. |
H A D | cpu_dummy.cc | 9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. |
H A D | remote_gdb.hh | 9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. |
H A D | types.hh | 9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. |
H A D | utility.hh | 9850:87d6b41749e9 Wed Sep 04 13:22:00 EDT 2013 Andreas Hansson <andreas.hansson@arm.com> arch: Resurrect the NOISA build target and rename it NULL This patch makes it possible to once again build gem5 without any ISA. The main purpose is to enable work around the interconnect and memory system without having to build any CPU models or device models. The regress script is updated to include the NULL ISA target. Currently no regressions make use of it, but all the testers could (and perhaps should) transition to it. |
/gem5/util/statetrace/arch/arm/ | ||
H A D | tracechild.hh | 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
/gem5/util/statetrace/arch/i686/ | ||
H A D | tracechild.cc | 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
H A D | tracechild.hh | 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
/gem5/util/statetrace/base/ | ||
H A D | statetrace.cc | 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
H A D | tracechild.cc | 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
/gem5/src/arch/x86/isa/insts/x87/arithmetic/ | ||
H A D | division.py | 10784:2f1a0f6d5d77 Mon Apr 13 18:33:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 mult/div instructions |
H A D | multiplication.py | 10784:2f1a0f6d5d77 Mon Apr 13 18:33:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 mult/div instructions |
/gem5/src/dev/arm/ | ||
H A D | abstract_nvm.hh | 10801:049eb85e8ea2 Thu Apr 23 13:37:00 EDT 2015 Rene de Jong <rene.dejong@arm.com> arm, dev: Add a NAND flash timing model This adds a NAND flash timing model. This model takes the number of planes into account and is ultimately intended to be used as a high-level performance model for any device using flash. To access the memory, use either readMemory or writeMemory. To make use of the model you will need an interface model such as UFSHostDevice, which is part of a separate patch. At the moment the flash device is part of the ARM device tree since the only use if the UFSHostDevice, and that in turn relies on the ARM GIC. |
H A D | AbstractNVM.py | 10801:049eb85e8ea2 Thu Apr 23 13:37:00 EDT 2015 Rene de Jong <rene.dejong@arm.com> arm, dev: Add a NAND flash timing model This adds a NAND flash timing model. This model takes the number of planes into account and is ultimately intended to be used as a high-level performance model for any device using flash. To access the memory, use either readMemory or writeMemory. To make use of the model you will need an interface model such as UFSHostDevice, which is part of a separate patch. At the moment the flash device is part of the ARM device tree since the only use if the UFSHostDevice, and that in turn relies on the ARM GIC. |
/gem5/src/mem/ | ||
H A D | drampower.hh | 11229:1b9331fd8966 Wed Nov 25 13:52:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> mem: Fix search-replace issues in DRAMPower wrapper license Fix a number of unintentional insertions of 'const'. |
/gem5/src/arch/power/linux/ | ||
H A D | linux.cc | 11383:5ac090acd180 Thu Mar 17 13:24:00 EDT 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: extend mmap system call to support file backed mmaps For O3, which has a stat that counts reg reads, there is an additional reg read per mmap() call since there's an arg we no longer ignore. Otherwise, stats should not be affected. 11382:654272b82e94 Thu Mar 17 13:22:00 EDT 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: add many Linux kernel flags 11381:516213d2f0cf Thu Mar 17 13:22:00 EDT 2016 Brandon Potter <brandon.potter@amd.com> syscall_emul: rename OpenFlagTransTable struct The structure definition only had the open system call flag set in mind when it was named, so we rename it here with the intention of using it to define additional tables to translate flags for other system calls in the future. 8229:78bf55f23338 Fri Apr 15 13:44:00 EDT 2011 Nathan Binkert <nate@binkert.org> includes: sort all includes |
/gem5/tests/quick/se/60.gpu-randomtest/ref/x86/linux/gpu-randomtest-ruby-GPU_RfO/ | ||
H A D | config.ini | 11680:b4d943429dc6 Thu Oct 13 18:21:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update references |
H A D | simout | 11680:b4d943429dc6 Thu Oct 13 18:21:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update references |
H A D | simerr | 11680:b4d943429dc6 Thu Oct 13 18:21:00 EDT 2016 Curtis Dunham <Curtis.Dunham@arm.com> stats: update references |
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