Searched hist:11160 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/
H A Dreciprocal_estimation.py11160:10f28b61fcb1 Tue Oct 06 20:26:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> x86: implement rcpps and rcpss SSE insts

These are packed single-precision approximate reciprocal operations,
vector and scalar versions, respectively.

This code was basically developed by copying the code for
sqrtps and sqrtss. The mrcp micro-op was simplified relative to
msqrt since there are no double-precision versions of this operation.
/gem5/src/arch/x86/isa/microops/
H A Dmediaop.isa11160:10f28b61fcb1 Tue Oct 06 20:26:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> x86: implement rcpps and rcpss SSE insts

These are packed single-precision approximate reciprocal operations,
vector and scalar versions, respectively.

This code was basically developed by copying the code for
sqrtps and sqrtss. The mrcp micro-op was simplified relative to
msqrt since there are no double-precision versions of this operation.
/gem5/src/arch/x86/isa/decoder/
H A Dtwo_byte_opcodes.isa11160:10f28b61fcb1 Tue Oct 06 20:26:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> x86: implement rcpps and rcpss SSE insts

These are packed single-precision approximate reciprocal operations,
vector and scalar versions, respectively.

This code was basically developed by copying the code for
sqrtps and sqrtss. The mrcp micro-op was simplified relative to
msqrt since there are no double-precision versions of this operation.

Completed in 44 milliseconds