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| /gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/ | ||
| H A D | simultaneous_addition_and_subtraction.py | 10632:b415e0dabe21 Sat Jan 03 18:51:00 EST 2015 Maxime Martinasso <maxime.cscs@gmail.com> x86: implements the simd128 ADDSUBPD instruction This patch implements the simd128 ADDSUBPD instruction for the x86 architecture. Tested with a simple program in assembly language which executes the instruction. Checked that different versions of the instruction are executed by using the execution tracing option. Committed by: Nilay Vaish <nilay@cs.wisc.edu |
| /gem5/src/arch/x86/isa/decoder/ | ||
| H A D | two_byte_opcodes.isa | 10632:b415e0dabe21 Sat Jan 03 18:51:00 EST 2015 Maxime Martinasso <maxime.cscs@gmail.com> x86: implements the simd128 ADDSUBPD instruction This patch implements the simd128 ADDSUBPD instruction for the x86 architecture. Tested with a simple program in assembly language which executes the instruction. Checked that different versions of the instruction are executed by using the execution tracing option. Committed by: Nilay Vaish <nilay@cs.wisc.edu |
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