Searched hist:10506 (Results 1 - 7 of 7) sorted by relevance
/gem5/src/arch/arm/isa/formats/ | ||
H A D | misc.isa | 10506:aa23216161fa Thu Oct 30 00:18:00 EDT 2014 Ali Saidi <Ali.Saidi@ARM.com> arm: Mark some miscregs (timer counter) registers at unverifiable. The checker can't verify timer registers, so it should just grab the version from the executing CPU, otherwise it could get a larger value and diverge execution. |
H A D | aarch64.isa | 10506:aa23216161fa Thu Oct 30 00:18:00 EDT 2014 Ali Saidi <Ali.Saidi@ARM.com> arm: Mark some miscregs (timer counter) registers at unverifiable. The checker can't verify timer registers, so it should just grab the version from the executing CPU, otherwise it could get a larger value and diverge execution. |
/gem5/src/arch/arm/ | ||
H A D | tlb.hh | 12735:e3da526a0654 Wed May 16 11:16:00 EDT 2018 Andreas Sandberg <andreas.sandberg@arm.com> arch-arm: Respect EL from translation type There are cases where instructions request translations in the context of a lower EL. This is currently not respected in the TLB and the page table walker. Fix that. Change-Id: Icd59657a1ecfd8bd75a001bb1a4e41a6f4808a36 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10506 Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> |
H A D | miscregs.cc | 10506:aa23216161fa Thu Oct 30 00:18:00 EDT 2014 Ali Saidi <Ali.Saidi@ARM.com> arm: Mark some miscregs (timer counter) registers at unverifiable. The checker can't verify timer registers, so it should just grab the version from the executing CPU, otherwise it could get a larger value and diverge execution. |
H A D | miscregs.hh | 10506:aa23216161fa Thu Oct 30 00:18:00 EDT 2014 Ali Saidi <Ali.Saidi@ARM.com> arm: Mark some miscregs (timer counter) registers at unverifiable. The checker can't verify timer registers, so it should just grab the version from the executing CPU, otherwise it could get a larger value and diverge execution. |
H A D | table_walker.cc | 12735:e3da526a0654 Wed May 16 11:16:00 EDT 2018 Andreas Sandberg <andreas.sandberg@arm.com> arch-arm: Respect EL from translation type There are cases where instructions request translations in the context of a lower EL. This is currently not respected in the TLB and the page table walker. Fix that. Change-Id: Icd59657a1ecfd8bd75a001bb1a4e41a6f4808a36 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10506 Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> |
H A D | tlb.cc | 12735:e3da526a0654 Wed May 16 11:16:00 EDT 2018 Andreas Sandberg <andreas.sandberg@arm.com> arch-arm: Respect EL from translation type There are cases where instructions request translations in the context of a lower EL. This is currently not respected in the TLB and the page table walker. Fix that. Change-Id: Icd59657a1ecfd8bd75a001bb1a4e41a6f4808a36 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10506 Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> |
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