| /gem5/ext/drampower/src/ |
| H A D | MemCommand.cc | 56 void MemCommand::setType(MemCommand::cmds _type) argument
|
| /gem5/src/arch/x86/bios/ |
| H A D | intelmp.cc | 170 X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) : argument
185 ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length) argument
|
| H A D | smbios.cc | 91 X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) : argument
|
| H A D | intelmp.hh | 232 IntAssignment(X86IntelMPBaseConfigEntryParams * p, Enums::X86IntelMPInterruptType _interruptType, Enums::X86IntelMPPolarity polarity, Enums::X86IntelMPTriggerMode trigger, uint8_t _type, uint8_t _sourceBusID, uint8_t _sourceBusIRQ, uint8_t _destApicID, uint8_t _destApicIntIn) argument
|
| /gem5/src/sim/ |
| H A D | aux_vector.hh | 44 AuxVector(IntType _type, IntType _val) : type(_type), val(_val) {} argument
|
| H A D | fd_entry.hh | 245 int _type; member in class:SocketFDEntry
|
| /gem5/src/dev/virtio/ |
| H A D | fs9p.cc | 65 P9MsgInfo(P9MsgType _type, std::string _name) argument
|
| /gem5/src/base/ |
| H A D | remote_gdb.hh | 202 int _type; member in class:BaseRemoteGDB::TrapEvent
|
| /gem5/src/mem/ruby/slicc_interface/ |
| H A D | RubyRequest.hh | 65 RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb = PrefetchBit_No, ContextID _proc_id = 100, ContextID _core_id = 99, HSAScope _scope = HSAScope_UNSPECIFIED, HSASegment _segment = HSASegment_GLOBAL) argument
87 RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb, unsigned _proc_id, unsigned _core_id, int _wm_size, std::vector<bool> & _wm_mask, DataBlock & _Data, HSAScope _scope = HSAScope_UNSPECIFIED, HSASegment _segment = HSASegment_GLOBAL) argument
114 RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len, uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb, unsigned _proc_id, unsigned _core_id, int _wm_size, std::vector<bool> & _wm_mask, DataBlock & _Data, std::vector< std::pair<int,AtomicOpFunctor*> > _atomicOps, HSAScope _scope = HSAScope_UNSPECIFIED, HSASegment _segment = HSASegment_GLOBAL) argument
|
| /gem5/src/arch/arm/insts/ |
| H A D | mem64.hh | 211 MemoryReg64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset, ArmExtendType _type, uint64_t _shiftAmt) argument
|
| H A D | macromem.hh | 352 MicroIntRegXOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, RegIndex _ura, RegIndex _urb, RegIndex _urc, ArmExtendType _type, uint32_t _shiftAmt) argument
|
| /gem5/src/arch/hsail/ |
| H A D | operand.hh | 90 BrigRegOperandInfo(Brig::BrigKind16_t _kind, Brig::BrigType _type) argument
|
| /gem5/src/mem/ |
| H A D | dram_ctrl.hh | 155 constexpr Command(Data::MemCommand::cmds _type, uint8_t _bank, argument
|