| /gem5/src/base/ |
| H A D | output.hh | 129 const std::ios_base::openmode _mode; member in class:OutputFile
|
| /gem5/src/arch/alpha/ |
| H A D | kernel_stats.hh | 65 Stats::Vector _mode; member in class:AlphaISA::Kernel::Statistics
|
| /gem5/src/cpu/o3/ |
| H A D | rename_map.cc | 112 init(PhysRegFile *_regFile, RegIndex _intZeroReg, RegIndex _floatZeroReg, UnifiedFreeList *freeList, VecMode _mode) argument
|
| /gem5/src/arch/arm/ |
| H A D | stage2_lookup.hh | 77 Stage2LookUp(TLB *s1Tlb, TLB *s2Tlb, TlbEntry s1Te, const RequestPtr &_req, TLB::Translation *_transState, BaseTLB::Mode _mode, bool _timing, bool _functional, TLB::ArmTranslationType _tranType) argument
|
| H A D | semihosting.hh | 118 FileBase(ArmSemihosting &_parent, const char *name, const char *_mode) argument
|
| H A D | semihosting.cc | 785 FileFeatures( ArmSemihosting &_parent, const char *_name, const char *_mode) argument
|
| H A D | table_walker.cc | 190 walk(const RequestPtr &_req, ThreadContext *_tc, uint16_t _asid, uint8_t _vmid, bool _isHyp, TLB::Mode _mode, TLB::Translation *_trans, bool _timing, bool _functional, bool secure, TLB::ArmTranslationType tranType, bool _stage2Req) argument
|
| /gem5/src/cpu/ |
| H A D | translation.hh | 81 WholeTranslationState(const RequestPtr &_req, uint8_t *_data, uint64_t *_res, BaseTLB::Mode _mode) argument
95 WholeTranslationState(const RequestPtr &_req, const RequestPtr &_sreqLow, const RequestPtr &_sreqHigh, uint8_t *_data, uint64_t *_res, BaseTLB::Mode _mode) argument
|
| /gem5/src/arch/x86/ |
| H A D | pagetable_walker.cc | 70 start(ThreadContext * _tc, BaseTLB::Translation *_translation, const RequestPtr &_req, BaseTLB::Mode _mode) argument
95 startFunctional(ThreadContext * _tc, Addr &addr, unsigned &logBytes, BaseTLB::Mode _mode) argument
180 initState(ThreadContext * _tc, BaseTLB::Mode _mode, bool _isTiming) argument
|
| /gem5/src/arch/arm/insts/ |
| H A D | mem.hh | 89 RfeOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _base, AddrMode _mode, bool _wb) argument
133 SrsOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, uint32_t _regMode, AddrMode _mode, bool _wb) argument
|