Searched defs:MISCREG_STATUS (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/mips/ | ||
| H A D | registers.hh | 181 MISCREG_STATUS = 96, //Bank 12: 96-103 enumerator in enum:MipsISA::MiscRegIndex |
| /gem5/src/arch/riscv/ | ||
| H A D | registers.hh | 143 MISCREG_STATUS, enumerator in enum:RiscvISA::MiscRegIndex |
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