mem/cache/cache.cc

586     PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable(),
589     bool is_forward = (bus_pkt == nullptr);
594         bus_pkt = pkt;
598             bus_pkt->print());
604     Cycles latency = ticksToCycles(memSidePort.sendAtomic(bus_pkt));
606     bool is_invalidate = bus_pkt->isInvalidate();
610             bus_pkt->print(), old_state);
613     // in place in the bus_pkt == pkt structure, so we don't need
614     // to do anything.  Otherwise, use the separate bus_pkt to
618             assert(bus_pkt->isResponse());
619             if (bus_pkt->isError()) {
621                 pkt->copyError(bus_pkt);
623                 // note the use of pkt, not bus_pkt here.
629                 blk = handleFill(bus_pkt, blk, writebacks, allocate);
633             } else if (bus_pkt->isRead() ||
634                        bus_pkt->cmd == MemCmd::UpgradeResp) {
637                 blk = handleFill(bus_pkt, blk, writebacks,
647         delete bus_pkt;