dev/arm/gic_v3_cpu_interface.cc

124           if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
147           if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
167       // Interrupt Group 0 Enable register EL1
170           if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
184       // Interrupt Group 1 Enable register EL1
187           if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
219           if ((currEL() == EL1) && !inSecureState() &&
255           if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
285           if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
315         if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
358         if ((currEL() == EL1) && !inSecureState() && (hcr_imo || hcr_fmo)) {
391           if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
447           if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
500       // System Register Enable Register EL1
521          * (EL1 accesses to ICC_SRE_EL1 do not trap to EL2, RAO/WI)
540          * (EL1 accesses to ICC_SRE_EL1 do not trap to EL3.
559           if ((currEL() == EL1) && !inSecureState() && (hcr_imo || hcr_fmo)) {
746         if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
769         if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
791           if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
861           if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
939           if ((currEL() == EL1) && !inSecureState() &&
986             case EL1:
1049         if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
1057         if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
1082                 // Non secure writes from EL1 and EL2 are ignored
1127       // Control Register EL1
1130           if ((currEL() == EL1) && !inSecureState() && (hcr_imo || hcr_fmo)) {
1282           if ((currEL() == EL1) && !inSecureState() && (hcr_imo || hcr_fmo)) {
1323       // Interrupt Group 0 Enable Register EL1
1326           if ((currEL() == EL1) && !inSecureState() && hcr_fmo) {
1346       // Interrupt Group 1 Enable register EL1
1349           if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
1406       // System Register Enable Register EL1
1701         // Group 1 non-secure interrupts not visible in Secure EL1
2366       case EL1:
2538     if ((currEL() == EL1) && !inSecureState() && hcr_imo) {
2559         // EL1 and EL2