dev/arm/gic_v3_cpu_interface.cc

266           int lr_idx = getHPPVILR();
268           if (lr_idx >= 0) {
270                   isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
296           int lr_idx = getHPPVILR();
298           if (lr_idx >= 0) {
300                   isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
415           int lr_idx = getHPPVILR();
418           if (lr_idx >= 0) {
420                   isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
422               if (!ich_lr_el2.Group && hppviCanPreempt(lr_idx)) {
427                       virtualActivateIRQ(lr_idx);
433                       isa->setMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx,
471           int lr_idx = getHPPVILR();
474           if (lr_idx >= 0) {
476                   isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
478               if (ich_lr_el2.Group && hppviCanPreempt(lr_idx)) {
483                       virtualActivateIRQ(lr_idx);
489                       isa->setMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx,
690         for (int lr_idx = 0; lr_idx < VIRTUAL_NUM_LIST_REGS; lr_idx++) {
692                 isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
696                 value |= (1 << lr_idx);
834           int lr_idx = virtualFindActive(int_id);
836           if (lr_idx < 0) {
841                   isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
849                       virtualDeactivateIRQ(lr_idx);
913           int lr_idx = virtualFindActive(int_id);
915           if (lr_idx < 0) {
920                   isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
927                       virtualDeactivateIRQ(lr_idx);
1033           int lr_idx = virtualFindActive(int_id);
1035           if (lr_idx < 0) {
1039               virtualDeactivateIRQ(lr_idx);
1633     for (uint32_t lr_idx = 0; lr_idx < VIRTUAL_NUM_LIST_REGS; lr_idx++) {
1635             isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
1640             return lr_idx;
1858 Gicv3CPUInterface::virtualActivateIRQ(uint32_t lr_idx)
1862             lr_idx);
1875     isa->setMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx, ich_lr_el);
1893 Gicv3CPUInterface::virtualDeactivateIRQ(int lr_idx)
1896             lr_idx);
1910     isa->setMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx, ich_lr_el2);
2065     int lr_idx = getHPPVILR();
2067     if (lr_idx >= 0) {
2069             isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
2071         if (hppviCanPreempt(lr_idx)) {
2151 Gicv3CPUInterface::hppviCanPreempt(int lr_idx) const
2160         isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
2433     for (int lr_idx = 0; lr_idx < VIRTUAL_NUM_LIST_REGS; lr_idx++) {
2435             isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);
2439             value |= (1 << lr_idx);
2472     for (int lr_idx = 0; lr_idx < VIRTUAL_NUM_LIST_REGS; lr_idx++) {
2474             isa->readMiscRegNoEffect(MISCREG_ICH_LR0_EL2 + lr_idx);