dev/arm/gic_v3_cpu_interface.cc

1422         ICH_HCR_EL2 ich_hcr_el2 =
1425         if (requested_ich_hcr_el2.EOIcount >= ich_hcr_el2.EOIcount)
1430             ich_hcr_el2.EOIcount = requested_ich_hcr_el2.EOIcount;
1433         ich_hcr_el2.TDIR = requested_ich_hcr_el2.TDIR;
1434         ich_hcr_el2.TSEI = requested_ich_hcr_el2.TSEI;
1435         ich_hcr_el2.TALL1 = requested_ich_hcr_el2.TALL1;;
1436         ich_hcr_el2.TALL0 = requested_ich_hcr_el2.TALL0;;
1437         ich_hcr_el2.TC = requested_ich_hcr_el2.TC;
1438         ich_hcr_el2.VGrp1DIE = requested_ich_hcr_el2.VGrp1DIE;
1439         ich_hcr_el2.VGrp1EIE = requested_ich_hcr_el2.VGrp1EIE;
1440         ich_hcr_el2.VGrp0DIE = requested_ich_hcr_el2.VGrp0DIE;
1441         ich_hcr_el2.VGrp0EIE = requested_ich_hcr_el2.VGrp0EIE;
1442         ich_hcr_el2.NPIE = requested_ich_hcr_el2.NPIE;
1443         ich_hcr_el2.LRENPIE = requested_ich_hcr_el2.LRENPIE;
1444         ich_hcr_el2.UIE = requested_ich_hcr_el2.UIE;
1445         ich_hcr_el2.En = requested_ich_hcr_el2.En;
1446         val = ich_hcr_el2;
2080     ICH_HCR_EL2 ich_hcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
2082     if (ich_hcr_el2.En) {
2153     ICH_HCR_EL2 ich_hcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
2154     if (!ich_hcr_el2.En) {
2211     RegVal ich_hcr_el2 = isa->readMiscRegNoEffect(MISCREG_ICH_HCR_EL2);
2212     uint32_t EOI_cout = bits(ich_hcr_el2, 31, 27);
2214     ich_hcr_el2 = insertBits(ich_hcr_el2, 31, 27, EOI_cout);
2215     isa->setMiscRegNoEffect(MISCREG_ICH_HCR_EL2, ich_hcr_el2);
2451     ICH_HCR_EL2 ich_hcr_el2 =
2485     if (ich_hcr_el2.UIE && (num_valid_interrupts < 2)) {
2492     if (ich_hcr_el2.LRENPIE && ich_hcr_el2.EOIcount) {
2499     if (ich_hcr_el2.NPIE && (num_pending_interrupts == 0)) {
2506     if (ich_hcr_el2.VGrp0EIE && ich_vmcr_el2.VENG0) {
2513     if (ich_hcr_el2.VGrp0DIE && !ich_vmcr_el2.VENG0) {
2520     if (ich_hcr_el2.VGrp1EIE && ich_vmcr_el2.VENG1) {
2527     if (ich_hcr_el2.VGrp1DIE && !ich_vmcr_el2.VENG1) {