dev/arm/gic_v2.cc

89         // Initialize cpu highest int
299     DPRINTF(GIC, "gic cpu read register %#x cpu context: %d\n", daddr,
366                     "CPU %d reading IAR.id=%d IAR.cpu=%d, iar=0x%x\n",
383         panic("Tried to read Gic cpu at offset %#x\n", daddr);
566     DPRINTF(GIC, "gic cpu write register cpu:%d %#x val: %#x\n",
618         DPRINTF(Interrupt, "CPU %d done handling intr IAR = %d from cpu %d\n",
632         panic("Tried to write Gic cpu at offset %#x\n", daddr);
676             // Interrupt requesting cpu only
697             // interrupt requesting cpu only
719 GicV2::genSwiMask(int cpu)
721     if (cpu > sys->numContexts())
723     return ULL(0x0101010101010101) << cpu;
727 GicV2::getCpuPriority(unsigned cpu)
734     return cpuPriority[cpu] & (0xff00 >> (7 - cpuBpr[cpu]));
740     for (int cpu = 0; cpu < sys->numContexts(); cpu++) {
741         if (!cpuEnabled(cpu))
747         uint8_t highest_pri = getCpuPriority(cpu);
751             if (!cpuSgiPending[swi] && !cpuSgiPendingExt[cpu])
753             if ((cpuSgiPending[swi] & genSwiMask(cpu)) ||
754                 (cpuSgiPendingExt[cpu] & (1 << swi)))
755                 if (highest_pri > getIntPriority(cpu, swi)) {
756                     highest_pri = getIntPriority(cpu, swi);
762         if (cpuPpiPending[cpu]) {
767                 const bool ppi_pending = bits(cpuPpiPending[cpu], ppi_idx);
768                 const bool ppi_enabled = bits(getIntEnabled(cpu, 0), int_num);
770                     highest_pri > getIntPriority(cpu, int_num);
773                     highest_pri = getIntPriority(cpu, int_num);
782             if (getIntEnabled(cpu, x) & getPendingInt(cpu, x)) {
786                     /* Set current pending int as highest int for current cpu
788                        and if current cpu is the target (for mp configs only)
790                     if ((bits(getIntEnabled(cpu, x), y)
791                         &bits(getPendingInt(cpu, x), y)) &&
792                         (getIntPriority(cpu, int_nm) < highest_pri))
795                                ? (getCpuTarget(cpu, int_nm) == cpu)
796                                : (getCpuTarget(cpu, int_nm) & (1 << cpu)))) {
797                             highest_pri = getIntPriority(cpu, int_nm);
804         uint32_t prev_highest = cpuHighestInt[cpu];
805         cpuHighestInt[cpu] = highest_int;
808             if (isLevelSensitive(cpu, prev_highest)) {
810                 DPRINTF(Interrupt, "Clear IRQ for cpu%d\n", cpu);
811                 clearInt(cpu, prev_highest);
816         /* @todo make this work for more than one cpu, need to handle 1:N, N:N
818         if (enabled && cpuEnabled(cpu) &&
819             (highest_pri < getCpuPriority(cpu)) &&
820             !(getActiveInt(cpu, intNumToWord(highest_int))
823             DPRINTF(Interrupt, "Posting interrupt %d to cpu%d\n", highest_int,
824                     cpu);
826             if (isFiq(cpu, highest_int)) {
827                 postFiq(cpu, curTick() + intLatency);
829                 postInt(cpu, curTick() + intLatency);
838     for (int cpu = 0; cpu < sys->numContexts(); cpu++) {
839         if (!cpuEnabled(cpu))
844                 if (((cpuSgiActive[i] & genSwiMask(cpu)) ||
845                      (cpuSgiActiveExt[cpu] & (1 << i))) &&
846                         (getIntPriority(cpu, i) < maxPriority))
847                     maxPriority = getIntPriority(cpu, i);
849                 if ((cpuPpiActive[cpu] & ( 1 << (i - SGI_MAX))) &&
850                         (getIntPriority(cpu, i) < maxPriority))
851                     maxPriority = getIntPriority(cpu, i);
854                 if (getActiveInt(cpu, intNumToWord(i))
856                     if (getIntPriority(cpu, i) < maxPriority)
857                         maxPriority = getIntPriority(cpu, i);
860         iccrpr[cpu] = maxPriority;
879 GicV2::sendPPInt(uint32_t num, uint32_t cpu)
882             num, cpu);
883     cpuPpiPending[cpu] |= 1 << (num - SGI_MAX);
907 GicV2::clearPPInt(uint32_t num, uint32_t cpu)
910             num, cpu);
911     cpuPpiPending[cpu] &= ~(1 << (num - SGI_MAX));
926 GicV2::postInt(uint32_t cpu, Tick when)
928     if (!(postIntEvent[cpu]->scheduled())) {
930         eventq->schedule(postIntEvent[cpu], when);
935 GicV2::postDelayedInt(uint32_t cpu)
937     platform->intrctrl->post(cpu, ArmISA::INT_IRQ, 0);
945 GicV2::postFiq(uint32_t cpu, Tick when)
947     if (!(postFiqEvent[cpu]->scheduled())) {
949         eventq->schedule(postFiqEvent[cpu], when);
954 GicV2::postDelayedFiq(uint32_t cpu)
956     platform->intrctrl->post(cpu, ArmISA::INT_FIQ, 0);
1057         for (uint32_t cpu = 0; cpu < CPU_MAX; cpu++) {
1058             if (interrupt_time[cpu])
1059                 schedule(postIntEvent[cpu], interrupt_time[cpu]);