cpu/o3/fetch_impl.hh

287         .desc("Number of inst fetches per cycle")
559         const DynInstPtr &inst, TheISA::PCState &nextPC)
566     if (!inst->isControl()) {
567         TheISA::advancePC(nextPC, inst->staticInst);
568         inst->setPredTarg(nextPC);
569         inst->setPredTaken(false);
573     ThreadID tid = inst->threadNumber;
574     predict_taken = branchPred->predict(inst->staticInst, inst->seqNum,
580                 tid, inst->seqNum, inst->pcState().instAddr(), nextPC);
584                 tid, inst->seqNum, inst->pcState().instAddr());
589             tid, inst->seqNum, inst->pcState().instAddr(), nextPC);
590     inst->setPredTarg(nextPC);
591     inst->setPredTaken(predict_taken);
969             const auto& inst = fetchQueue[tid].front();
970             toDecode->insts[toDecode->size++] = inst;
973                     tid, inst->seqNum, fetchQueue[tid].size());
1288             MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
1289             decoder[tid]->moreBytes(thisPC, fetchAddr, inst);