Lines Matching refs:bits
440 DPRINTF(MiscRegs, "Reading MiscReg %s with set res0 bits: %#x\n",
444 DPRINTF(MiscRegs, "Reading MiscReg %s with clear res1 bits: %#x\n",
700 // Set the bits for unimplemented coprocessors to RAO/WI
728 return 0; // bits [63:0] RES0 (reserved for future use)
763 miscRegs[lower] = bits(v, 31, 0);
764 miscRegs[upper] = bits(v, 63, 32);
1161 bits(newVal, 7,0));
1176 bits(newVal, 7,0));
1189 bits(newVal, 7,0));
1202 bits(newVal, 7,0));
1277 static_cast<Addr>(bits(newVal, 35, 0)) << 12);
1292 static_cast<Addr>(bits(newVal, 35, 0)) << 12);
1306 bits(newVal, 7,0));
1320 bits(newVal, 7,0));
1333 bits(newVal, 7,0));
1346 bits(newVal, 7,0));
1453 static_cast<Addr>(bits(newVal, 43, 0)) << 12,
1465 static_cast<Addr>(bits(newVal, 43, 0)) << 12,
1479 static_cast<Addr>(bits(newVal, 43, 0)) << 12,
1492 static_cast<Addr>(bits(newVal, 43, 0)) << 12,
1504 auto asid = haveLargeAsid64 ? bits(newVal, 63, 48) :
1505 bits(newVal, 55, 48);
1508 static_cast<Addr>(bits(newVal, 43, 0)) << 12,
1520 auto asid = haveLargeAsid64 ? bits(newVal, 63, 48) :
1521 bits(newVal, 55, 48);
1524 static_cast<Addr>(bits(newVal, 43, 0)) << 12,
1536 auto asid = haveLargeAsid64 ? bits(newVal, 63, 48) :
1537 bits(newVal, 55, 48);
1548 auto asid = haveLargeAsid64 ? bits(newVal, 63, 48) :
1549 bits(newVal, 55, 48);
1565 static_cast<Addr>(bits(newVal, 43, 0)) << 12);
1578 static_cast<Addr>(bits(newVal, 43, 0)) << 12);
1592 static_cast<Addr>(bits(newVal, 35, 0)) << 12);
1606 static_cast<Addr>(bits(newVal, 35, 0)) << 12);