Lines Matching refs:RegAddr
48 regs[RegAddr(L2_FEATURES)] =
54 regs[RegAddr(TILER_FEATURES)] =
59 regs[RegAddr(MEM_FEATURES)] = 0x1;
61 regs[RegAddr(MMU_FEATURES)] = 0x2830;
62 regs[RegAddr(AS_PRESENT)] = 0xff;
63 regs[RegAddr(JS_PRESENT)] = 0x7;
64 regs[RegAddr(JS0_FEATURES)] = 0x20e;
65 regs[RegAddr(JS1_FEATURES)] = 0x1fe;
66 regs[RegAddr(JS2_FEATURES)] = 0x7e;
68 regs[RegAddr(TEXTURE_FEATURES_0)] = 0x00fe001e;
69 regs[RegAddr(TEXTURE_FEATURES_1)] = 0xffff;
70 regs[RegAddr(TEXTURE_FEATURES_2)] = 0x9f81ffff;
72 regs[RegAddr(THREAD_MAX_THREADS)] = 0x100;
73 regs[RegAddr(THREAD_MAX_WORKGROUP_SIZE)] = 0x100;
74 regs[RegAddr(THREAD_MAX_BARRIER_SIZE)] = 0x100;
75 regs[RegAddr(THREAD_FEATURES)] = 0x0a040400;
77 regs.set64(RegAddr(SHADER_PRESENT_LO), 0xf);
78 regs.set64(RegAddr(TILER_PRESENT_LO), 0x1);
79 regs.set64(RegAddr(L2_PRESENT_LO), 0x1);
87 regs[RegAddr(GPU_ID)] = midgard.gpuId;