mcpat/cacti/technology.cc

71     uint32_t ram_cell_tech_type    = (is_tag) ? g_ip->tag_arr_ram_cell_tech_type : g_ip->data_arr_ram_cell_tech_type;
122         if (ram_cell_tech_type == 3 ) {
401             if (ram_cell_tech_type == lp_dram) {
446             } else if (ram_cell_tech_type == comm_dram) {
652             if (ram_cell_tech_type == lp_dram) {
697             } else if (ram_cell_tech_type == comm_dram) {
904             if (ram_cell_tech_type == lp_dram) {
949             } else if (ram_cell_tech_type == comm_dram) {
1156             if (ram_cell_tech_type == lp_dram) {
1201             } else if (ram_cell_tech_type == comm_dram) {
1411             if (ram_cell_tech_type == 3) {} else if (ram_cell_tech_type == 4) {
1534             if (ram_cell_tech_type == 3) {} else if (ram_cell_tech_type == 4) {
1633         g_tp.sram_cell.Vdd       += curr_alpha * vdd[ram_cell_tech_type];
1634         g_tp.sram_cell.l_phy     += curr_alpha * Lphy[ram_cell_tech_type];
1635         g_tp.sram_cell.l_elec    += curr_alpha * Lelec[ram_cell_tech_type];
1636         g_tp.sram_cell.t_ox      += curr_alpha * t_ox[ram_cell_tech_type];
1637         g_tp.sram_cell.Vth       += curr_alpha * v_th[ram_cell_tech_type];
1638         g_tp.sram_cell.C_g_ideal += curr_alpha * c_g_ideal[ram_cell_tech_type];
1639         g_tp.sram_cell.C_fringe  += curr_alpha * c_fringe[ram_cell_tech_type];
1640         g_tp.sram_cell.C_junc    += curr_alpha * c_junc[ram_cell_tech_type];
1642         g_tp.sram_cell.I_on_n    += curr_alpha * I_on_n[ram_cell_tech_type];
1643         g_tp.sram_cell.R_nch_on  += curr_alpha * Rnchannelon[ram_cell_tech_type];
1644         g_tp.sram_cell.R_pch_on  += curr_alpha * Rpchannelon[ram_cell_tech_type];
1645         g_tp.sram_cell.n_to_p_eff_curr_drv_ratio += curr_alpha * n_to_p_eff_curr_drv_ratio[ram_cell_tech_type];
1646         g_tp.sram_cell.long_channel_leakage_reduction += curr_alpha * long_channel_leakage_reduction[ram_cell_tech_type];
1647         g_tp.sram_cell.I_off_n   += curr_alpha * I_off_n[ram_cell_tech_type][g_ip->temp - 300];
1648         g_tp.sram_cell.I_off_p   += curr_alpha * I_off_n[ram_cell_tech_type][g_ip->temp - 300];
1649         g_tp.sram_cell.I_g_on_n   += curr_alpha * I_g_on_n[ram_cell_tech_type][g_ip->temp - 300];
1650         g_tp.sram_cell.I_g_on_p   += curr_alpha * I_g_on_n[ram_cell_tech_type][g_ip->temp - 300];
1679         g_tp.cam_cell.Vdd       += curr_alpha * vdd[ram_cell_tech_type];
1680         g_tp.cam_cell.l_phy     += curr_alpha * Lphy[ram_cell_tech_type];
1681         g_tp.cam_cell.l_elec    += curr_alpha * Lelec[ram_cell_tech_type];
1682         g_tp.cam_cell.t_ox      += curr_alpha * t_ox[ram_cell_tech_type];
1683         g_tp.cam_cell.Vth       += curr_alpha * v_th[ram_cell_tech_type];
1684         g_tp.cam_cell.C_g_ideal += curr_alpha * c_g_ideal[ram_cell_tech_type];
1685         g_tp.cam_cell.C_fringe  += curr_alpha * c_fringe[ram_cell_tech_type];
1686         g_tp.cam_cell.C_junc    += curr_alpha * c_junc[ram_cell_tech_type];
1688         g_tp.cam_cell.I_on_n    += curr_alpha * I_on_n[ram_cell_tech_type];
1689         g_tp.cam_cell.R_nch_on  += curr_alpha * Rnchannelon[ram_cell_tech_type];
1690         g_tp.cam_cell.R_pch_on  += curr_alpha * Rpchannelon[ram_cell_tech_type];
1691         g_tp.cam_cell.n_to_p_eff_curr_drv_ratio += curr_alpha * n_to_p_eff_curr_drv_ratio[ram_cell_tech_type];
1692         g_tp.cam_cell.long_channel_leakage_reduction += curr_alpha * long_channel_leakage_reduction[ram_cell_tech_type];
1693         g_tp.cam_cell.I_off_n   += curr_alpha * I_off_n[ram_cell_tech_type][g_ip->temp - 300];
1694         g_tp.cam_cell.I_off_p   += curr_alpha * I_off_n[ram_cell_tech_type][g_ip->temp - 300];
1695         g_tp.cam_cell.I_g_on_n   += curr_alpha * I_g_on_n[ram_cell_tech_type][g_ip->temp - 300];
1696         g_tp.cam_cell.I_g_on_p   += curr_alpha * I_g_on_n[ram_cell_tech_type][g_ip->temp - 300];
1765     if (ram_cell_tech_type == comm_dram) {
1795     g_tp.sram.Vbitpre = vdd[ram_cell_tech_type];
1796     g_tp.cam.Vbitpre = vdd[ram_cell_tech_type];//Sheng
2580             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2583             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2586             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2589             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2592             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2595             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2598             [(ram_cell_tech_type == comm_dram) ? 3 : 0];
2601             [(ram_cell_tech_type == comm_dram) ? 3 : 0];