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11960:c7bf1b698ccd |
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29-Mar-2017 |
Gabe Black <gabeblack@google.com> |
stats: Update some stats after simulated program exit behavior was changed.
The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.
commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600
syscall-emul: Rewrite system call exit code
Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
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| #
11570:4aac82f10951 |
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21-Jul-2016 |
Curtis Dunham <Curtis.Dunham@arm.com> |
stats: update references
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| #
10798:74e3c7359393 |
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22-Apr-2015 |
Steve Reinhardt <steve.reinhardt@amd.com> |
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
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| #
10036:80e84beef3bb |
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24-Jan-2014 |
Ali Saidi <Ali.Saidi@ARM.com> |
stats: update stats for cache occupancy and clock domain changes
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| #
8889:2e38fd9937a9 |
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09-Mar-2012 |
Geoffrey Blake <geoffrey.blake@arm.com> |
CheckerCPU: Make some basic regression tests for CheckerCPU
Adds regression tests for the CheckerCPU. ARM ISA support
only at this point.
|