History log of /gem5/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout
Revision Date Author Comments
# 11960:c7bf1b698ccd 29-Mar-2017 Gabe Black <gabeblack@google.com>

stats: Update some stats after simulated program exit behavior was changed.

The following CL delayed program exit and changed the stats for many if not
most of the SE mode regressions.

commit 2c1286865fc2542a0586ca4ff40b00765d17b348
Author: Brandon Potter <Brandon.Potter@amd.com>
Date: Wed Mar 1 14:52:23 2017 -0600

syscall-emul: Rewrite system call exit code

Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16
Reviewed-on: https://gem5-review.googlesource.com/2656
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>


# 11680:b4d943429dc6 13-Oct-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update references


# 11589:af2f7fef4875 02-Aug-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update references


# 11570:4aac82f10951 21-Jul-2016 Curtis Dunham <Curtis.Dunham@arm.com>

stats: update references


# 11515:c48c7cc5a522 02-Jun-2016 Andreas Sandberg <andreas.sandberg@arm.com>

stats: Update to match ARM ISA changes


# 11390:f40859930028 17-Mar-2016 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update stats for ld.so support

Additional auxv entries leads to more instructions in start-up
while walking the list, along with different cache conflicts
wrt stack entries.


# 11384:e3cbd2823210 17-Mar-2016 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update stats for mmap() change.

SE O3 runs see an additional reg read per mmap() call.


# 10798:74e3c7359393 22-Apr-2015 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update for previous changeset

Very small differences in IQ-specific O3 stats.


# 10242:cb4e86c17767 22-Jun-2014 Steve Reinhardt <steve.reinhardt@amd.com>

stats: update for O3 changes

Mostly small differences in total ticks, but O3 stall causes
shifted significantly.

30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex
by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8%
slower.


# 10038:7eccd14e2610 24-Jan-2014 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for ARMv8 changes


# 10036:80e84beef3bb 24-Jan-2014 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for cache occupancy and clock domain changes


# 9924:31ef410b6843 16-Oct-2013 Steve Reinhardt <steve.reinhardt@amd.com>

test: update stats

Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.


# 9885:afd9ea6101d9 28-Sep-2013 Steve Reinhardt <stever@gmail.com>

tests: update reference outputs

Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes. There are a few stats.txt updates too, but
they are in the minority.


# 9620:89aa34e10625 27-Mar-2013 Nilay Vaish <nilay@cs.wisc.edu>

regressions: update due to cache latency fix


# 9575:6c4d6fdf3644 04-Mar-2013 Ali Saidi <saidi@eecs.umich.edu>

stats: update patches for branch predictor and fetch updates.


# 9481:b0fa6b872f40 24-Jan-2013 Nilay Vaish <nilay@cs.wisc.edu>

regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.


# 9449:56610ab73040 07-Jan-2013 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for previous changes.


# 9348:44d31345e360 02-Nov-2012 Ali Saidi <Ali.Saidi@ARM.com>

update stats for preceeding changes


# 9265:8fe936e937bd 25-Sep-2012 Ali Saidi <Ali.Saidi@ARM.com>

ARM: update stats for bp and squash fixes.


# 9096:8971a998190a 09-Jul-2012 Andreas Hansson <andreas.hansson@arm.com>

Stats: Updates due to bus changes

This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.


# 9079:9a244ebdc3c9 29-Jun-2012 Ali Saidi <Ali.Saidi@ARM.com>

Stats: Update stats for RAS and LRU fixes.


# 9055:38f1926fb599 05-Jun-2012 Ali Saidi <saidi@eecs.umich.edu>

all: Update stats for memory per master and total fix.


# 8983:8800b05e1cb3 09-May-2012 Nathan Binkert <nate@binkert.org>

stats: update stats for no_value -> nan
Lots of accumulated older changes too.


# 8911:4da2ea94319f 21-Mar-2012 Ali Saidi <Ali.Saidi@ARM.com>

ARM: Update stats for IT and conditional branch changes


# 8893:e29c604a2582 09-Mar-2012 Ali Saidi <saidi@eecs.umich.edu>

ARM: Update stats for CBNZ fix.


# 8844:a451e4eda591 13-Feb-2012 Ali Saidi <Ali.Saidi@ARM.com>

bp: fix up stats for changes to branch predictor


# 8835:7c68f84d7c4e 12-Feb-2012 Ali Saidi <Ali.Saidi@ARM.com>

stats: update stats for insts/ops and master id changes


# 8825:23b349d77ac1 10-Feb-2012 Nilay Vaish <nilay@cs.wisc.edu>

Regressions: Update stats due to O3 CPU changes


# 8802:ef66a9083bc4 28-Jan-2012 Gabe Black <gblack@eecs.umich.edu>

SE/FS: Make both SE and FS tests available all the time.