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11897:bfddfbac3a1a |
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24-Feb-2017 |
Sudhanshu Jha <sudhanshu.jha@arm.com> |
dev: Add support for single-pass scan out in the PixelPump
Add a helper function to scan out an entire frame in one time step. This requires the public PixelPump to be changed somewhat to separate timing updates from general PixelPump control. Instead of calling PixelPump::start(timings), timings now need to be updated using a separate call to PixelPump::updateTimings(timings) before calling PixelPump::start().
Display controllers that don't need accurate timing (e.g., in KVM mode), can use the new PixelPump::renderFrame() API to render an entire frame in one step. This call results in the same callbacks (e.g., calls to nextPixel()) as the timing calls, but they all happen in immediately. Unlike the timing counterpart, renderFrame() doesn't support buffer underruns and will panic if nextPixle() indicates an underrun.
Change-Id: I76c84db04249b02d4207c5281d82aa693d0881be Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2241 Reviewed-by: Rahul Thakur <rjthakur@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
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11012:f2ca575d27fd |
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07-Aug-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
dev: Implement a simple display timing generator
Timing generator for a pixel-based display. The timing generator is intended for display processors driving a standard rasterized display. The simplest possible display processor needs to derive from this class and override the nextPixel() method to feed the display with pixel data.
Pixels are ordered relative to the top left corner of the display. Scan lines appear in the following order:
* Vertical Sync (starting at line 0) * Vertical back porch * Visible lines * Vertical front porch
Pixel order within a scan line:
* Horizontal Sync * Horizontal Back Porch * Visible pixels * Horizontal Front Porch
All events in the timing generator are automatically suspended on a drain() request and restarted on drainResume(). This is conceptually equivalent to clock gating when the pixel clock while the system is draining. By gating the pixel clock, we prevent display controllers from disturbing a memory system that is about to drain.
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