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12484:be3fa5e27fb5 |
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30-Jan-2018 |
Christian Menard <christian.menard@tu-dresden.de> |
arch-x86: consistent style of comments in system files
Change-Id: I9f208819b8c1a5c46a77262eb533bb47adb2b905 Reviewed-on: https://gem5-review.googlesource.com/7701 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
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12458:8de44b407db4 |
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08-Jan-2018 |
Gabe Black <gabeblack@google.com> |
x86, mem: Don't try to force physical addresses on the system.
Use the system object to allocate physical memory instead of manually placing certain structures and then forcing the system to start other allocations after them in physical memory.
Change-Id: Ie18c81645c3b648c64a6d7a649a0e50f7028f344 Reviewed-on: https://gem5-review.googlesource.com/7346 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
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11800:54436a1784dc |
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09-Nov-2016 |
Brandon Potter <brandon.potter@amd.com> |
style: [patch 3/22] reduce include dependencies in some headers
Used cppclean to help identify useless includes and removed them. This involved erroneously included headers, but also cases where forward declarations could have been used rather than a full include.
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10554:fe2e2f06a7c8 |
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23-Nov-2014 |
Alexandru Dutu <alexandru.dutu@amd.com> |
x86: Segment initialization to support KvmCPU in SE This patch sets up low and high privilege code and data segments and places them in the following order: cs low, ds low, ds, cs, in the GDT. Additionally, a syscall and page fault handler for KvmCPU in SE mode are defined. The order of the segment selectors in GDT is required in this manner for interrupt handling to work properly. Segment initialization is done for all the thread contexts.
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10299:bec0c5ffc323 |
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28-Aug-2014 |
Alexandru <alexandru.dutu@amd.com> |
mem: adding architectural page table support for SE mode This patch enables the use of page tables that are stored in system memory and respect x86 specification, in SE mode. It defines an architectural page table for x86 as a MultiLevelPageTable class and puts a placeholder class for other ISAs page tables, giving the possibility for future implementation.
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9292:e57c7d9736a5 |
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15-Oct-2012 |
Andreas Hansson <andreas.hansson@arm.com> |
Checkpoint: Make system serialize call children
This patch changes how the serialization of the system works. The base class had a non-virtual serialize and unserialize, that was hidden by a function with the same name for a number of subclasses (most likely not intentional as the base class should have been virtual). A few of the derived systems had no specialization at all (e.g. Power and x86 that simply called the System::serialize), but MIPS and Alpha adds additional symbol table entries to the checkpoint.
Instead of overriding the virtual function, the additional entries are now printed through a virtual function (un)serializeSymtab. The reason for not calling System::serialize from the two related systems is that a follow up patch will require the system to also serialize the PhysicalMemory, and if this is done in the base class if ends up being between the general parts and the specialized symbol table.
With this patch, the checkpoint is not modified, as the order of the segments is unchanged.
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7532:3f6413fc37a2 |
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17-Aug-2010 |
Steve Reinhardt <steve.reinhardt@amd.com> |
sim: revamp unserialization procedure
Replace direct call to unserialize() on each SimObject with a pair of calls for better control over initialization in both ckpt and non-ckpt cases.
If restoring from a checkpoint, loadState(ckpt) is called on each SimObject. The default implementation simply calls unserialize() if there is a corresponding checkpoint section, so we get backward compatibility for existing objects. However, objects can override loadState() to get other behaviors, e.g., doing other programmed initializations after unserialize(), or complaining if no checkpoint section is found. (Note that the default warning for a missing checkpoint section is now gone.)
If not restoring from a checkpoint, we call the new initState() method on each SimObject instead. This provides a hook for state initializations that are only required when *not* restoring from a checkpoint.
Given this new framework, do some cleanup of LiveProcess subclasses and X86System, which were (in some cases) emulating initState() behavior in startup via a local flag or (in other cases) erroneously doing initializations in startup() that clobbered state loaded earlier by unserialize().
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7087:fb8d5786ff30 |
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24-May-2010 |
Nathan Binkert <nate@binkert.org> |
copyright: Change HP copyright on x86 code to be more friendly
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5627:31eac202dbd1 |
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11-Oct-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Create SimObjects in python and C++ to represent the ACPI system description tables.
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5625:ea7d3676ac8d |
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11-Oct-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Create SimObjects in python and C++ to represent the Intel MP tables.
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5615:1c4b9b1aa500 |
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10-Oct-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Turn SMBios structures into simobjects.
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5334:5136aad50b97 |
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23-Jan-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Put an SMBios/DMI table in memory. This is basically just the header right now, but there's an untested mechanism in place to fill out the table and make sure everything is updated correctly.
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5299:e61b9f2a9732 |
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02-Dec-2007 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Move startup code to the system object to initialize a Linux system.
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5132:ad5e94876bfc |
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07-Oct-2007 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Make an x86 system object.
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