History log of /gem5/src/arch/x86/isa/insts/general_purpose/input_output/string_io.py
Revision Date Author Comments
# 8672:2c7ece076c8b 09-Jan-2012 Nilay Vaish <nilay@cs.wisc.edu>

X86: Add memory fence to I/O instructions


# 8103:53c2d9b1c15d 02-Mar-2011 Gabe Black <gblack@eecs.umich.edu>

X86: Mark IO reads and writes as non-speculative.


# 7087:fb8d5786ff30 24-May-2010 Nathan Binkert <nate@binkert.org>

copyright: Change HP copyright on x86 code to be more friendly


# 5927:5e3367b103da 25-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Do a merge for the zero extension microop.


# 5661:443e6f925027 12-Oct-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Create a SeqOp class of microops and make Br one of them.


# 5420:dc0041a51920 12-Jun-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Make string instructions work when rcx=0.


# 5418:501cb81c89df 12-Jun-2008 Gabe Black <gblack@eecs.umich.edu>

X86: Bypass unaligned access support for register addressed MSRs.


# 5239:0920dfb94514 12-Nov-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0.


# 5167:3668fc87f144 19-Oct-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the string IO instructions, ins and outs.


# 5081:2ccce8600a9d 19-Sep-2007 Gabe Black <gblack@eecs.umich.edu>

X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.