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8672:2c7ece076c8b |
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09-Jan-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
X86: Add memory fence to I/O instructions
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| #
8103:53c2d9b1c15d |
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02-Mar-2011 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Mark IO reads and writes as non-speculative.
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| #
7087:fb8d5786ff30 |
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24-May-2010 |
Nathan Binkert <nate@binkert.org> |
copyright: Change HP copyright on x86 code to be more friendly
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5968:6f9f1438360a |
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27-Feb-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Make instructions that use intseg preserve all 8 bytes of their addresses.
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| #
5927:5e3367b103da |
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25-Feb-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Do a merge for the zero extension microop.
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| #
5418:501cb81c89df |
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12-Jun-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Bypass unaligned access support for register addressed MSRs.
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| #
5322:db50c4044662 |
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12-Jan-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Fix the general IO instructions dataSize.
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| #
5239:0920dfb94514 |
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12-Nov-2007 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Change the meaning of the sext and zext width operand, and make sext set zext if the sign bit is 0.
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| #
5161:e7334f2d7bef |
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19-Oct-2007 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Implement the in/out instructions. These will still need support from the TLB and memory system.
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| #
5081:2ccce8600a9d |
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19-Sep-2007 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
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