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14212:c0575e785e98 |
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13-Aug-2019 |
Giacomo Travaglini <giacomo.travaglini@arm.com> |
arm,kvm: Fix python imports from global namespace
Change-Id: I31bd3563c2427efd7e520f714b1ca6f480fa4e85 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20491 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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10860:cba0f26038b4 |
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01-Jun-2015 |
Andreas Sandberg <andreas.sandberg@arm.com> |
kvm, arm: Add support for aarch64
This changeset adds support for aarch64 in kvm. The CPU module supports both checkpointing and online CPU model switching as long as no devices are simulated by the host kernel. It currently has the following limitations:
* The system register based generic timer can only be simulated by the host kernel. Workaround: Use a memory mapped timer instead to simulate the timer in gem5.
* Simulating devices (e.g., the generic timer) in the host kernel requires that the host kernel also simulates the GIC.
* ID registers in the host and in gem5 must match for switching between simulated CPUs and KVM. This is particularly important for ID registers describing memory system capabilities (e.g., ASID size, physical address size).
* Switching between a virtualized CPU and a simulated CPU is currently not supported if in-kernel device emulation is used. This could be worked around by adding support for switching to the gem5 (e.g., the KvmGic) side of the device models. A simpler workaround is to avoid in-kernel device models altogether.
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