ARM: Hook up 16 bit thumb load/store multiple.

ARM: Reimplement load/store multiple external to the decoder.

ARM: Eliminate decoding for the very deprecated FPA instructions.

ARM: Differentiate between LDM exception return and LDM user regs.

ARM: Make the exception return form of ldm restore CPSR.

ARM: Create a new type of load uop that restores spsr into cpsr.

ARM: Support forcing load/store multiple to use user registers.

ARM: Simplify the load/store multiple generation code.

Specifically, get rid of the big switch statement so more cases can be
handled. Enumerating all the possible settings doesn't scale well. Also do
some minor style clean up.

ARM: Set up an intregs.hh for ARM.

Add constants for all the modes and registers, maps for aliasing, functions
that use the maps and range check, and use a named constant instead of a magic
number for the microcode register.

ARM: Move the remaining microops out of the decoder and into the ISA desc.

ARM: Move the memory microops out of the decoder and into the ISA desc.

ARM: Move the integer microops out of the decoder and into the ISA desc.

ARM: Get rid of end_addr in the ArmMacroStore constructor.

ARM: Added unimplemented load/store multiple instructions.

ARM: Simplify the ISA desc by pulling some classes out of it.

ARM: Don't downconvert ExtMachInsts to MachInsts.

ARM: Make the isa parser aware that CPSR is being used.

arm: add ARM support to M5