sc_master_port.hh revision 12047
112047Schristian.menard@tu-dresden.de/* 212047Schristian.menard@tu-dresden.de * Copyright (c) 2016, Dresden University of Technology (TU Dresden) 312047Schristian.menard@tu-dresden.de * All rights reserved. 412047Schristian.menard@tu-dresden.de * 512047Schristian.menard@tu-dresden.de * Redistribution and use in source and binary forms, with or without 612047Schristian.menard@tu-dresden.de * modification, are permitted provided that the following conditions are 712047Schristian.menard@tu-dresden.de * met: 812047Schristian.menard@tu-dresden.de * 912047Schristian.menard@tu-dresden.de * 1. Redistributions of source code must retain the above copyright notice, 1012047Schristian.menard@tu-dresden.de * this list of conditions and the following disclaimer. 1112047Schristian.menard@tu-dresden.de * 1212047Schristian.menard@tu-dresden.de * 2. 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IN NO EVENT SHALL THE COPYRIGHT HOLDER 2412047Schristian.menard@tu-dresden.de * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 2512047Schristian.menard@tu-dresden.de * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 2612047Schristian.menard@tu-dresden.de * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 2712047Schristian.menard@tu-dresden.de * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 2812047Schristian.menard@tu-dresden.de * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 2912047Schristian.menard@tu-dresden.de * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 3012047Schristian.menard@tu-dresden.de * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3112047Schristian.menard@tu-dresden.de * 3212047Schristian.menard@tu-dresden.de * Authors: Christian Menard 3312047Schristian.menard@tu-dresden.de */ 3412047Schristian.menard@tu-dresden.de 3512047Schristian.menard@tu-dresden.de#ifndef __SC_MASTER_PORT_HH__ 3612047Schristian.menard@tu-dresden.de#define __SC_MASTER_PORT_HH__ 3712047Schristian.menard@tu-dresden.de 3812047Schristian.menard@tu-dresden.de#include <tlm_utils/peq_with_cb_and_phase.h> 3912047Schristian.menard@tu-dresden.de 4012047Schristian.menard@tu-dresden.de#include <systemc> 4112047Schristian.menard@tu-dresden.de#include <tlm> 4212047Schristian.menard@tu-dresden.de 4312047Schristian.menard@tu-dresden.de#include "mem/external_master.hh" 4412047Schristian.menard@tu-dresden.de#include "sc_peq.hh" 4512047Schristian.menard@tu-dresden.de#include "sim_control.hh" 4612047Schristian.menard@tu-dresden.de 4712047Schristian.menard@tu-dresden.denamespace Gem5SystemC 4812047Schristian.menard@tu-dresden.de{ 4912047Schristian.menard@tu-dresden.de 5012047Schristian.menard@tu-dresden.de// forward declaration 5112047Schristian.menard@tu-dresden.declass Gem5MasterTransactor; 5212047Schristian.menard@tu-dresden.de 5312047Schristian.menard@tu-dresden.de/** 5412047Schristian.menard@tu-dresden.de * This is a gem5 master port that translates TLM transactions to gem5 packets. 5512047Schristian.menard@tu-dresden.de * 5612047Schristian.menard@tu-dresden.de * Upon receiving a TLM transaction (b_transport, nb_transport_fw, 5712047Schristian.menard@tu-dresden.de * dbg_transport) the port generates a gem5 packet and initializes the packet 5812047Schristian.menard@tu-dresden.de * with information from the transaction payload. The original TLM payload is 5912047Schristian.menard@tu-dresden.de * added as a sender state to the gem5 packet. This way the payload can be 6012047Schristian.menard@tu-dresden.de * restored when the response packet arrives at the port. 6112047Schristian.menard@tu-dresden.de * 6212047Schristian.menard@tu-dresden.de * Special care is required, when the TLM transaction originates from a 6312047Schristian.menard@tu-dresden.de * SCSlavePort (i.e. it is a gem5 packet that enters back into the gem5 world). 6412047Schristian.menard@tu-dresden.de * This is a common scenario, when multiple gem5 CPUs communicate via a SystemC 6512047Schristian.menard@tu-dresden.de * interconnect. In this case, the master port restores the original packet 6612047Schristian.menard@tu-dresden.de * from the payload extension (added by the SCSlavePort) and forwards it to the 6712047Schristian.menard@tu-dresden.de * gem5 world. Throughout the code, this mechanism is called 'pipe through'. 6812047Schristian.menard@tu-dresden.de * 6912047Schristian.menard@tu-dresden.de * If gem5 operates in atomic mode, the master port registers the TLM blocking 7012047Schristian.menard@tu-dresden.de * interface and automatically translates non-blocking requests to blocking. 7112047Schristian.menard@tu-dresden.de * If gem5 operates in timing mode, the transactor registers the non-blocking 7212047Schristian.menard@tu-dresden.de * interface. Then, the transactor automatically translated blocking requests. 7312047Schristian.menard@tu-dresden.de * It is assumed that the mode (atomic/timing) does not change during 7412047Schristian.menard@tu-dresden.de * execution. 7512047Schristian.menard@tu-dresden.de */ 7612047Schristian.menard@tu-dresden.declass SCMasterPort : public ExternalMaster::Port 7712047Schristian.menard@tu-dresden.de{ 7812047Schristian.menard@tu-dresden.de private: 7912047Schristian.menard@tu-dresden.de struct TlmSenderState : public Packet::SenderState 8012047Schristian.menard@tu-dresden.de { 8112047Schristian.menard@tu-dresden.de tlm::tlm_generic_payload& trans; 8212047Schristian.menard@tu-dresden.de TlmSenderState(tlm::tlm_generic_payload& trans) 8312047Schristian.menard@tu-dresden.de : trans(trans) 8412047Schristian.menard@tu-dresden.de { 8512047Schristian.menard@tu-dresden.de } 8612047Schristian.menard@tu-dresden.de }; 8712047Schristian.menard@tu-dresden.de 8812047Schristian.menard@tu-dresden.de tlm_utils::peq_with_cb_and_phase<SCMasterPort> peq; 8912047Schristian.menard@tu-dresden.de 9012047Schristian.menard@tu-dresden.de bool waitForRetry; 9112047Schristian.menard@tu-dresden.de tlm::tlm_generic_payload* pendingRequest; 9212047Schristian.menard@tu-dresden.de PacketPtr pendingPacket; 9312047Schristian.menard@tu-dresden.de 9412047Schristian.menard@tu-dresden.de bool needToSendRetry; 9512047Schristian.menard@tu-dresden.de 9612047Schristian.menard@tu-dresden.de bool responseInProgress; 9712047Schristian.menard@tu-dresden.de 9812047Schristian.menard@tu-dresden.de Gem5MasterTransactor* transactor; 9912047Schristian.menard@tu-dresden.de 10012047Schristian.menard@tu-dresden.de System* system; 10112047Schristian.menard@tu-dresden.de 10212047Schristian.menard@tu-dresden.de Gem5SimControl& simControl; 10312047Schristian.menard@tu-dresden.de 10412047Schristian.menard@tu-dresden.de protected: 10512047Schristian.menard@tu-dresden.de // payload event call back 10612047Schristian.menard@tu-dresden.de void peq_cb(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase); 10712047Schristian.menard@tu-dresden.de 10812047Schristian.menard@tu-dresden.de // The TLM target interface 10912047Schristian.menard@tu-dresden.de tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans, 11012047Schristian.menard@tu-dresden.de tlm::tlm_phase& phase, 11112047Schristian.menard@tu-dresden.de sc_core::sc_time& t); 11212047Schristian.menard@tu-dresden.de void b_transport(tlm::tlm_generic_payload& trans, sc_core::sc_time& t); 11312047Schristian.menard@tu-dresden.de unsigned int transport_dbg(tlm::tlm_generic_payload& trans); 11412047Schristian.menard@tu-dresden.de bool get_direct_mem_ptr(tlm::tlm_generic_payload& trans, 11512047Schristian.menard@tu-dresden.de tlm::tlm_dmi& dmi_data); 11612047Schristian.menard@tu-dresden.de 11712047Schristian.menard@tu-dresden.de // Gem5 SCMasterPort interface 11812047Schristian.menard@tu-dresden.de bool recvTimingResp(PacketPtr pkt); 11912047Schristian.menard@tu-dresden.de void recvReqRetry(); 12012047Schristian.menard@tu-dresden.de void recvRangeChange(); 12112047Schristian.menard@tu-dresden.de 12212047Schristian.menard@tu-dresden.de public: 12312047Schristian.menard@tu-dresden.de SCMasterPort(const std::string& name_, 12412047Schristian.menard@tu-dresden.de const std::string& systemc_name, 12512047Schristian.menard@tu-dresden.de ExternalMaster& owner_, 12612047Schristian.menard@tu-dresden.de Gem5SimControl& simControl); 12712047Schristian.menard@tu-dresden.de 12812047Schristian.menard@tu-dresden.de void bindToTransactor(Gem5MasterTransactor* transactor); 12912047Schristian.menard@tu-dresden.de 13012047Schristian.menard@tu-dresden.de friend PayloadEvent<SCMasterPort>; 13112047Schristian.menard@tu-dresden.de 13212047Schristian.menard@tu-dresden.de private: 13312047Schristian.menard@tu-dresden.de void sendEndReq(tlm::tlm_generic_payload& trans); 13412047Schristian.menard@tu-dresden.de void sendBeginResp(tlm::tlm_generic_payload& trans, 13512047Schristian.menard@tu-dresden.de sc_core::sc_time& delay); 13612047Schristian.menard@tu-dresden.de 13712047Schristian.menard@tu-dresden.de void handleBeginReq(tlm::tlm_generic_payload& trans); 13812047Schristian.menard@tu-dresden.de void handleEndResp(tlm::tlm_generic_payload& trans); 13912047Schristian.menard@tu-dresden.de 14012047Schristian.menard@tu-dresden.de PacketPtr generatePacket(tlm::tlm_generic_payload& trans); 14112047Schristian.menard@tu-dresden.de void destroyPacket(PacketPtr pkt); 14212047Schristian.menard@tu-dresden.de 14312047Schristian.menard@tu-dresden.de void checkTransaction(tlm::tlm_generic_payload& trans); 14412047Schristian.menard@tu-dresden.de}; 14512047Schristian.menard@tu-dresden.de 14612047Schristian.menard@tu-dresden.declass SCMasterPortHandler : public ExternalMaster::Handler 14712047Schristian.menard@tu-dresden.de{ 14812047Schristian.menard@tu-dresden.de private: 14912047Schristian.menard@tu-dresden.de Gem5SimControl& control; 15012047Schristian.menard@tu-dresden.de 15112047Schristian.menard@tu-dresden.de public: 15212047Schristian.menard@tu-dresden.de SCMasterPortHandler(Gem5SimControl& control) : control(control) {} 15312047Schristian.menard@tu-dresden.de 15412047Schristian.menard@tu-dresden.de ExternalMaster::Port *getExternalPort(const std::string &name, 15512047Schristian.menard@tu-dresden.de ExternalMaster &owner, 15612047Schristian.menard@tu-dresden.de const std::string &port_data); 15712047Schristian.menard@tu-dresden.de}; 15812047Schristian.menard@tu-dresden.de 15912047Schristian.menard@tu-dresden.de} 16012047Schristian.menard@tu-dresden.de 16112047Schristian.menard@tu-dresden.de#endif 162