main.cc revision 11821:39b0a51c9e76
12SN/A/*
29608Sandreas.hansson@arm.com * Copyright (c) 2015, University of Kaiserslautern
38707Sandreas.hansson@arm.com * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
48707Sandreas.hansson@arm.com * All rights reserved.
58707Sandreas.hansson@arm.com *
68707Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without
78707Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are
88707Sandreas.hansson@arm.com * met:
98707Sandreas.hansson@arm.com *
108707Sandreas.hansson@arm.com * 1. Redistributions of source code must retain the above copyright notice,
118707Sandreas.hansson@arm.com *    this list of conditions and the following disclaimer.
128707Sandreas.hansson@arm.com *
138707Sandreas.hansson@arm.com * 2. Redistributions in binary form must reproduce the above copyright
141762SN/A *    notice, this list of conditions and the following disclaimer in the
157897Shestness@cs.utexas.edu *    documentation and/or other materials provided with the distribution.
162SN/A *
172SN/A * 3. Neither the name of the copyright holder nor the names of its
182SN/A *    contributors may be used to endorse or promote products derived from
192SN/A *    this software without specific prior written permission.
202SN/A *
212SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
222SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
232SN/A * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
242SN/A * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
252SN/A * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
262SN/A * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
272SN/A * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
282SN/A * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
292SN/A * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
302SN/A * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
312SN/A * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
322SN/A *
332SN/A * Authors: Matthias Jung
342SN/A *          Christian Menard
352SN/A *          Abdul Mutaal Ahmad
362SN/A */
372SN/A
382SN/A/**
392SN/A * @file
402665Ssaidi@eecs.umich.edu *
412665Ssaidi@eecs.umich.edu *  Example top level file for SystemC-TLM integration with C++-only
422665Ssaidi@eecs.umich.edu *  instantiation.
437897Shestness@cs.utexas.edu *
442SN/A */
452SN/A
461717SN/A#include <systemc>
471717SN/A#include <tlm>
482SN/A
492SN/A#include "cli_parser.hh"
502SN/A#include "report_handler.hh"
519850Sandreas.hansson@arm.com#include "sc_target.hh"
529850Sandreas.hansson@arm.com#include "sim_control.hh"
539850Sandreas.hansson@arm.com#include "stats.hh"
549850Sandreas.hansson@arm.com
559850Sandreas.hansson@arm.comint
569850Sandreas.hansson@arm.comsc_main(int argc, char **argv)
578745Sgblack@eecs.umich.edu{
584182Sgblack@eecs.umich.edu    CliParser parser;
595664Sgblack@eecs.umich.edu    parser.parse(argc, argv);
60707SN/A
618229Snate@binkert.org    sc_core::sc_report_handler::set_handler(reportHandler);
6256SN/A
638779Sgblack@eecs.umich.edu    Gem5SystemC::Gem5SimControl simControl("gem5",
644776Sgblack@eecs.umich.edu                                           parser.getConfigFile(),
6510464SAndreas.Sandberg@ARM.com                                           parser.getSimulationEnd(),
669814Sandreas.hansson@arm.com                                           parser.getDebugFlags());
6710529Smorr@cs.wisc.edu    Target *memory;
682SN/A
6910529Smorr@cs.wisc.edu    unsigned long long int memorySize = 512*1024*1024ULL;
708901Sandreas.hansson@arm.com
712315SN/A    tlm::tlm_initiator_socket <> *mem_port =
722680Sktlim@umich.edu        dynamic_cast<tlm::tlm_initiator_socket<> *>(
732SN/A                    sc_core::sc_find_object("gem5.memory")
7410529Smorr@cs.wisc.edu                );
7510529Smorr@cs.wisc.edu
7610529Smorr@cs.wisc.edu    if (mem_port) {
7710529Smorr@cs.wisc.edu        SC_REPORT_INFO("sc_main", "Port Found");
7810529Smorr@cs.wisc.edu        memory = new Target("memory",
7910529Smorr@cs.wisc.edu                            parser.getVerboseFlag(),
8010529Smorr@cs.wisc.edu                            memorySize,
8110529Smorr@cs.wisc.edu                            parser.getMemoryOffset());
8210529Smorr@cs.wisc.edu
8310529Smorr@cs.wisc.edu        memory->socket.bind(*mem_port);
8410529Smorr@cs.wisc.edu    } else {
8510529Smorr@cs.wisc.edu        SC_REPORT_FATAL("sc_main", "Port Not Found");
8610529Smorr@cs.wisc.edu        std::exit(EXIT_FAILURE);
872356SN/A    }
882356SN/A
892356SN/A    SC_REPORT_INFO("sc_main", "Start of Simulation");
906144Sksewell@umich.edu
912356SN/A    sc_core::sc_start();
922356SN/A
936144Sksewell@umich.edu    SC_REPORT_INFO("sc_main", "End of Simulation");
942356SN/A
952356SN/A    CxxConfig::statsDump();
966144Sksewell@umich.edu
972356SN/A    return EXIT_SUCCESS;
982356SN/A}
992356SN/A