o3_stat_config.ini revision 9935:cc9dc514036e 
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36# Author: Dam Sunwoo
37#
38# Sample stats config file (O3CPU) for m5stats2streamline.py
39#
40# Stats grouped together will show as grouped in Streamline.
41# E.g.,
42#
43# icache =
44#    icache.overall_hits::total
45#    icache.overall_misses::total
46#
47# will display the icache as a stacked line chart.
48# Charts will still be configurable in Streamline.
49
50[PER_CPU_STATS]
51# "system.cpu#." will automatically prepended for per-CPU stats
52
53icache =
54    icache.overall_hits::total
55    icache.overall_misses::total
56
57dcache =
58    dcache.overall_hits::total
59    dcache.overall_misses::total
60
61[PER_SWITCHCPU_STATS]
62# If starting from checkpoints, CPU stats will be kept in system.switch_cpus#.
63# structures.
64# "system.switch_cpus#" will automatically prepended for per-CPU stats.
65# Note: L1 caches and table walker caches will still be connected to
66# system.cpu#!
67
68commit_inst_count =
69    commit.committedInsts
70    commit.commitSquashedInsts
71
72cycles =
73    numCycles
74    idleCycles
75
76branch_mispredict =
77    commit.branchMispredicts
78
79itb =
80    itb.hits
81    itb.misses
82
83dtb =
84    dtb.hits
85    dtb.misses
86
87commit_inst_breakdown =
88    commit.loads
89    commit.membars
90    commit.branches
91    commit.fp_insts
92    commit.int_insts
93
94int_regfile =
95    int_regfile_reads
96    int_regfile_writes
97
98misc_regfile =
99    misc_regfile_reads
100    misc_regfile_writes
101
102rename_full =
103    rename.ROBFullEvents
104    rename.IQFullEvents
105    rename.LSQFullEvents
106
107[PER_L2_STATS]
108# Automatically adapts to how many l2 caches are in the system
109
110l2 =
111    overall_hits::total
112    overall_misses::total
113
114[OTHER_STATS]
115# Anything that doesn't belong to CPU or L2 caches
116
117physmem =
118    system.physmem.bytes_read::total
119    system.physmem.bytes_written::total
120