m5op_x86.S revision 12157
12330SN/A/* 22330SN/A * Copyright (c) 2003-2006 The Regents of The University of Michigan 32330SN/A * All rights reserved. 42330SN/A * 52330SN/A * Redistribution and use in source and binary forms, with or without 62330SN/A * modification, are permitted provided that the following conditions are 72330SN/A * met: redistributions of source code must retain the above copyright 82330SN/A * notice, this list of conditions and the following disclaimer; 92330SN/A * redistributions in binary form must reproduce the above copyright 102330SN/A * notice, this list of conditions and the following disclaimer in the 112330SN/A * documentation and/or other materials provided with the distribution; 122330SN/A * neither the name of the copyright holders nor the names of its 132330SN/A * contributors may be used to endorse or promote products derived from 142330SN/A * this software without specific prior written permission. 152330SN/A * 162330SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172330SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182330SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192330SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202330SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212330SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222330SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232330SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242330SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252330SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262330SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Gabe Black 292330SN/A * Nathan Binkert 302292SN/A * Ali Saidi 312292SN/A */ 322292SN/A 332292SN/A#include <gem5/asm/generic/m5ops.h> 342980Sgblack@eecs.umich.edu 356658Snate@binkert.org#ifdef M5OP_ADDR 368229Snate@binkert.org/* Use the memory mapped m5op interface */ 372362SN/A#define TWO_BYTE_OP(name, number) \ 382680Sktlim@umich.edu .globl name; \ 392683Sktlim@umich.edu .func name; \ 402683Sktlim@umich.eduname: \ 412678Sktlim@umich.edu mov m5_mem, %r11; \ 422292SN/A mov $number, %rax; \ 432292SN/A shl $8, %rax; \ 442292SN/A mov 0(%r11, %rax, 1), %rax; \ 453548Sgblack@eecs.umich.edu ret; \ 463548Sgblack@eecs.umich.edu .endfunc; 473548Sgblack@eecs.umich.edu 483548Sgblack@eecs.umich.edu#else 492330SN/A/* Use the magic instruction based m5op interface. This does not work 502292SN/A * in virtualized environments. 512862Sktlim@umich.edu */ 523486Sktlim@umich.edu 533402Sktlim@umich.edu#define TWO_BYTE_OP(name, number) \ 542862Sktlim@umich.edu .globl name; \ 552330SN/A .func name; \ 562330SN/Aname: \ 572330SN/A .byte 0x0F, 0x04; \ 582330SN/A .word number; \ 592330SN/A ret; \ 602330SN/A .endfunc; 612292SN/A 622683Sktlim@umich.edu#endif 632683Sktlim@umich.edu 646331Sgblack@eecs.umich.eduTWO_BYTE_OP(arm, M5OP_ARM) 652683Sktlim@umich.eduTWO_BYTE_OP(quiesce, M5OP_QUIESCE) 663486Sktlim@umich.eduTWO_BYTE_OP(quiesceNs, M5OP_QUIESCE_NS) 673486Sktlim@umich.eduTWO_BYTE_OP(quiesceCycle, M5OP_QUIESCE_CYCLE) 682862Sktlim@umich.eduTWO_BYTE_OP(quiesceTime, M5OP_QUIESCE_TIME) 692862Sktlim@umich.eduTWO_BYTE_OP(rpns, M5OP_RPNS) 702862Sktlim@umich.eduTWO_BYTE_OP(m5_exit, M5OP_EXIT) 712862Sktlim@umich.eduTWO_BYTE_OP(m5_fail, M5OP_FAIL) 725712Shsul@eecs.umich.eduTWO_BYTE_OP(m5_initparam, M5OP_INIT_PARAM) 732683Sktlim@umich.eduTWO_BYTE_OP(m5_loadsymbol, M5OP_LOAD_SYMBOL) 745714Shsul@eecs.umich.eduTWO_BYTE_OP(m5_reset_stats, M5OP_RESET_STATS) 755714Shsul@eecs.umich.eduTWO_BYTE_OP(m5_dump_stats, M5OP_DUMP_STATS) 765714Shsul@eecs.umich.eduTWO_BYTE_OP(m5_dumpreset_stats, M5OP_DUMP_RESET_STATS) 775714Shsul@eecs.umich.eduTWO_BYTE_OP(m5_checkpoint, M5OP_CHECKPOINT) 786221Snate@binkert.orgTWO_BYTE_OP(m5_readfile, M5OP_READ_FILE) 792683Sktlim@umich.eduTWO_BYTE_OP(m5_writefile, M5OP_WRITE_FILE) 806221Snate@binkert.orgTWO_BYTE_OP(m5_debugbreak, M5OP_DEBUG_BREAK) 812683Sktlim@umich.eduTWO_BYTE_OP(m5_switchcpu, M5OP_SWITCH_CPU) 822683Sktlim@umich.eduTWO_BYTE_OP(m5_addsymbol, M5OP_ADD_SYMBOL) 832683Sktlim@umich.eduTWO_BYTE_OP(m5_panic, M5OP_PANIC) 842683Sktlim@umich.eduTWO_BYTE_OP(m5_work_begin, M5OP_WORK_BEGIN) 852683Sktlim@umich.eduTWO_BYTE_OP(m5_work_end, M5OP_WORK_END) 868754Sgblack@eecs.umich.eduTWO_BYTE_OP(m5_togglesync, M5OP_DIST_TOGGLE_SYNC) 878754Sgblack@eecs.umich.edu