m5op_arm.S revision 9686
17732SAli.Saidi@ARM.com/* 27732SAli.Saidi@ARM.com * Copyright (c) 2010 ARM Limited 37732SAli.Saidi@ARM.com * All rights reserved 47732SAli.Saidi@ARM.com * 57732SAli.Saidi@ARM.com * The license below extends only to copyright in the software and shall 67732SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual 77732SAli.Saidi@ARM.com * property including but not limited to intellectual property relating 87732SAli.Saidi@ARM.com * to a hardware implementation of the functionality of the software 97732SAli.Saidi@ARM.com * licensed hereunder. You may use the software subject to the license 107732SAli.Saidi@ARM.com * terms below provided that you ensure that this notice is replicated 117732SAli.Saidi@ARM.com * unmodified and in its entirety in all distributions of the software, 127732SAli.Saidi@ARM.com * modified or unmodified, in source code or in binary form. 137732SAli.Saidi@ARM.com * 147732SAli.Saidi@ARM.com * Copyright (c) 2003-2006 The Regents of The University of Michigan 157732SAli.Saidi@ARM.com * All rights reserved. 167732SAli.Saidi@ARM.com * 177732SAli.Saidi@ARM.com * Redistribution and use in source and binary forms, with or without 187732SAli.Saidi@ARM.com * modification, are permitted provided that the following conditions are 197732SAli.Saidi@ARM.com * met: redistributions of source code must retain the above copyright 207732SAli.Saidi@ARM.com * notice, this list of conditions and the following disclaimer; 217732SAli.Saidi@ARM.com * redistributions in binary form must reproduce the above copyright 227732SAli.Saidi@ARM.com * notice, this list of conditions and the following disclaimer in the 237732SAli.Saidi@ARM.com * documentation and/or other materials provided with the distribution; 247732SAli.Saidi@ARM.com * neither the name of the copyright holders nor the names of its 257732SAli.Saidi@ARM.com * contributors may be used to endorse or promote products derived from 267732SAli.Saidi@ARM.com * this software without specific prior written permission. 277732SAli.Saidi@ARM.com * 287732SAli.Saidi@ARM.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 297732SAli.Saidi@ARM.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 307732SAli.Saidi@ARM.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 317732SAli.Saidi@ARM.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 327732SAli.Saidi@ARM.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 337732SAli.Saidi@ARM.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 347732SAli.Saidi@ARM.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 357732SAli.Saidi@ARM.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 367732SAli.Saidi@ARM.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 377732SAli.Saidi@ARM.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 387732SAli.Saidi@ARM.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 397732SAli.Saidi@ARM.com * 407732SAli.Saidi@ARM.com * Authors: Nathan Binkert 417732SAli.Saidi@ARM.com * Ali Saidi 427732SAli.Saidi@ARM.com * Chander Sudanthi 439660SAndreas.Sandberg@ARM.com * Andreas Sandberg 447732SAli.Saidi@ARM.com */ 458987SAli.Saidi@ARM.com.syntax unified 468987SAli.Saidi@ARM.com#ifdef __thumb__ 478987SAli.Saidi@ARM.com.thumb 488987SAli.Saidi@ARM.com#endif 497732SAli.Saidi@ARM.com 507732SAli.Saidi@ARM.com#include "m5ops.h" 517732SAli.Saidi@ARM.com 527732SAli.Saidi@ARM.com.text 537732SAli.Saidi@ARM.com 549660SAndreas.Sandberg@ARM.com.macro simple_op name, func, subfunc 559686Sandreas@sandberg.pp.se .align 2 569660SAndreas.Sandberg@ARM.com .globl \name 579660SAndreas.Sandberg@ARM.com\name: 589660SAndreas.Sandberg@ARM.com /* First, try to trap into m5 using the m5-kvm hypercall 599660SAndreas.Sandberg@ARM.com * hack. The bxj will become a branch to the fallback code 609660SAndreas.Sandberg@ARM.com * if it is executed in the normal m5 environment. 619660SAndreas.Sandberg@ARM.com */ 629660SAndreas.Sandberg@ARM.com push {lr} 639686Sandreas@sandberg.pp.se#ifdef __thumb__ 649686Sandreas@sandberg.pp.se adr lr, 1f+1 659686Sandreas@sandberg.pp.se#else 669686Sandreas@sandberg.pp.se adr lr, 1f 679686Sandreas@sandberg.pp.se#endif 689660SAndreas.Sandberg@ARM.com ldr ip, =((((\func) & 0xFF) << 8) | ((\subfunc) & 0xFF)) 699660SAndreas.Sandberg@ARM.com bxj lr 709660SAndreas.Sandberg@ARM.com pop {pc} 717732SAli.Saidi@ARM.com 729660SAndreas.Sandberg@ARM.com /* Old-style m5 pseudo instruction using CP1 accesses */ 739660SAndreas.Sandberg@ARM.com1: 749660SAndreas.Sandberg@ARM.com#ifdef __thumb__ 759660SAndreas.Sandberg@ARM.com .short 0xEE00 | \func 769660SAndreas.Sandberg@ARM.com .short 0x0110 | (\subfunc << 12) 779660SAndreas.Sandberg@ARM.com#else 789686Sandreas@sandberg.pp.se .long (0xEE000110 | (\func << 16) | (\subfunc << 12)) 799660SAndreas.Sandberg@ARM.com#endif 809660SAndreas.Sandberg@ARM.com pop {pc} 819660SAndreas.Sandberg@ARM.com.endm 827732SAli.Saidi@ARM.com 839660SAndreas.Sandberg@ARM.com#define SIMPLE_OP(name, func, subfunc) simple_op name, func, subfunc 849660SAndreas.Sandberg@ARM.com 859660SAndreas.Sandberg@ARM.comSIMPLE_OP(arm, arm_func, 0) 869660SAndreas.Sandberg@ARM.comSIMPLE_OP(quiesce, quiesce_func, 0) 879660SAndreas.Sandberg@ARM.comSIMPLE_OP(quiesceNs, quiescens_func, 0) 889660SAndreas.Sandberg@ARM.comSIMPLE_OP(quiesceCycle, quiescecycle_func, 0) 899660SAndreas.Sandberg@ARM.comSIMPLE_OP(quiesceTime, quiescetime_func, 0) 909660SAndreas.Sandberg@ARM.comSIMPLE_OP(rpns, rpns_func, 0) 919660SAndreas.Sandberg@ARM.comSIMPLE_OP(wakeCPU, wakecpu_func, 0) 929660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_exit, exit_func, 0) 939660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_initparam, initparam_func, 0) 949660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_loadsymbol, loadsymbol_func, 0) 959660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_reset_stats, resetstats_func, 0) 969660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_dump_stats, dumpstats_func, 0) 979660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_dumpreset_stats, dumprststats_func, 0) 989660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_checkpoint, ckpt_func, 0) 999660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_readfile, readfile_func, 0) 1009660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_writefile, writefile_func, 0) 1019660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_debugbreak, debugbreak_func, 0) 1029660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_switchcpu, switchcpu_func, 0) 1039660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_addsymbol, addsymbol_func, 0) 1049660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_panic, panic_func, 0) 1059660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_work_begin, work_begin_func, 0) 1069660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5_work_end, work_end_func, 0) 1079660SAndreas.Sandberg@ARM.com 1089660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_bsm, annotate_func, an_bsm) 1099660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_esm, annotate_func, an_esm) 1109660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_begin, annotate_func, an_begin) 1119660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_end, annotate_func, an_end) 1129660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_q, annotate_func, an_q) 1139660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_rq, annotate_func, an_rq) 1149660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_dq, annotate_func, an_dq) 1159660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_wf, annotate_func, an_wf) 1169660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_we, annotate_func, an_we) 1179660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_ws, annotate_func, an_ws) 1189660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_sq, annotate_func, an_sq) 1199660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_aq, annotate_func, an_aq) 1209660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_pq, annotate_func, an_pq) 1219660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_l, annotate_func, an_l) 1229660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_identify, annotate_func, an_identify) 1239660SAndreas.Sandberg@ARM.comSIMPLE_OP(m5a_getid, annotate_func, an_getid) 124