riscv_test.h revision 12771:75508af5d8dc
12SN/A// See LICENSE for license details.
21762SN/A
32SN/A#ifndef _ENV_VIRTUAL_SINGLE_CORE_H
42SN/A#define _ENV_VIRTUAL_SINGLE_CORE_H
52SN/A
62SN/A#include "../p/riscv_test.h"
72SN/A
82SN/A//-----------------------------------------------------------------------
92SN/A// Begin Macro
102SN/A//-----------------------------------------------------------------------
112SN/A
122SN/A#undef RVTEST_FP_ENABLE
132SN/A#define RVTEST_FP_ENABLE fssr x0
142SN/A
152SN/A#undef RVTEST_CODE_BEGIN
162SN/A#define RVTEST_CODE_BEGIN                                               \
172SN/A        .text;                                                          \
182SN/A        .global userstart;                                              \
192SN/Auserstart:                                                              \
202SN/A        init
212SN/A
222SN/A//-----------------------------------------------------------------------
232SN/A// Pass/Fail Macro
242SN/A//-----------------------------------------------------------------------
252SN/A
262SN/A#undef RVTEST_PASS
272665SN/A#define RVTEST_PASS li a0, 1; scall
282665SN/A
292SN/A#undef RVTEST_FAIL
302SN/A#define RVTEST_FAIL sll a0, TESTNUM, 1; 1:beqz a0, 1b; or a0, a0, 1; scall;
314826Ssaidi@eecs.umich.edu
324826Ssaidi@eecs.umich.edu//-----------------------------------------------------------------------
332SN/A// Data Section Macro
346216Snate@binkert.org//-----------------------------------------------------------------------
3510468Sandreas.hansson@arm.com
362SN/A#undef RVTEST_DATA_END
3714018Sgabeblack@google.com#define RVTEST_DATA_END
388706Sandreas.hansson@arm.com
392SN/A//-----------------------------------------------------------------------
403535SN/A// Supervisor mode definitions and macros
412SN/A//-----------------------------------------------------------------------
422SN/A
432680SN/A#define MAX_TEST_PAGES 63 // this must be the period of the LFSR below
442SN/A#define LFSR_NEXT(x) (((((x)^((x)>>1)) & 1) << 5) | ((x) >> 1))
457707Sgblack@eecs.umich.edu
462SN/A#define PGSHIFT 12
472SN/A#define PGSIZE (1UL << PGSHIFT)
4810468Sandreas.hansson@arm.com
492SN/A#define SIZEOF_TRAPFRAME_T ((__riscv_xlen / 8) * 36)
502SN/A
512SN/A#ifndef __ASSEMBLER__
522SN/A
532SN/Atypedef unsigned long pte_t;
542SN/A#define LEVELS (sizeof(pte_t) == sizeof(uint64_t) ? 3 : 2)
552SN/A#define PTIDXBITS (PGSHIFT - (sizeof(pte_t) == 8 ? 3 : 2))
562SN/A#define VPN_BITS (PTIDXBITS * LEVELS)
572SN/A#define VA_BITS (VPN_BITS + PGSHIFT)
582SN/A#define PTES_PER_PT (1UL << RISCV_PGLEVEL_BITS)
592SN/A#define MEGAPAGE_SIZE (PTES_PER_PT * PGSIZE)
602SN/A
6110468Sandreas.hansson@arm.comtypedef struct
622SN/A{
632SN/A  long gpr[32];
643535SN/A  long sr;
6510468Sandreas.hansson@arm.com  long epc;
6610468Sandreas.hansson@arm.com  long badvaddr;
673535SN/A  long cause;
682680SN/A} trapframe_t;
693535SN/A#endif
702SN/A
712680SN/A#endif
722SN/A