config.ini revision 11440:76b5639162af
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 38work_end_ckpt_count=0 39work_end_exit_count=0 40work_item_id=-1 41system_port=system.membus.slave[0] 42 43[system.clk_domain] 44type=SrcClockDomain 45clock=1000 46domain_id=-1 47eventq_index=0 48init_perf_level=0 49voltage_domain=system.voltage_domain 50 51[system.cpu] 52type=TimingSimpleCPU 53children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload 54branchPred=Null 55checker=Null 56clk_domain=system.cpu_clk_domain 57cpu_id=0 58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dtb=system.cpu.dtb 62eventq_index=0 63function_trace=false 64function_trace_start=0 65interrupts=system.cpu.interrupts 66isa=system.cpu.isa 67itb=system.cpu.itb 68max_insts_all_threads=0 69max_insts_any_thread=0 70max_loads_all_threads=0 71max_loads_any_thread=0 72numThreads=1 73profile=0 74progress_interval=0 75simpoint_start_insts= 76socket_id=0 77switched_out=false 78system=system 79tracer=system.cpu.tracer 80workload=system.cpu.workload 81dcache_port=system.cpu.dcache.cpu_side 82icache_port=system.cpu.icache.cpu_side 83 84[system.cpu.dcache] 85type=Cache 86children=tags 87addr_ranges=0:18446744073709551615 88assoc=2 89clk_domain=system.cpu_clk_domain 90clusivity=mostly_incl 91demand_mshr_reserve=1 92eventq_index=0 93hit_latency=2 94is_read_only=false 95max_miss_count=0 96mshrs=4 97prefetch_on_access=false 98prefetcher=Null 99response_latency=2 100sequential_access=false 101size=262144 102system=system 103tags=system.cpu.dcache.tags 104tgts_per_mshr=20 105write_buffers=8 106writeback_clean=false 107cpu_side=system.cpu.dcache_port 108mem_side=system.cpu.toL2Bus.slave[1] 109 110[system.cpu.dcache.tags] 111type=LRU 112assoc=2 113block_size=64 114clk_domain=system.cpu_clk_domain 115eventq_index=0 116hit_latency=2 117sequential_access=false 118size=262144 119 120[system.cpu.dtb] 121type=SparcTLB 122eventq_index=0 123size=64 124 125[system.cpu.icache] 126type=Cache 127children=tags 128addr_ranges=0:18446744073709551615 129assoc=2 130clk_domain=system.cpu_clk_domain 131clusivity=mostly_incl 132demand_mshr_reserve=1 133eventq_index=0 134hit_latency=2 135is_read_only=true 136max_miss_count=0 137mshrs=4 138prefetch_on_access=false 139prefetcher=Null 140response_latency=2 141sequential_access=false 142size=131072 143system=system 144tags=system.cpu.icache.tags 145tgts_per_mshr=20 146write_buffers=8 147writeback_clean=true 148cpu_side=system.cpu.icache_port 149mem_side=system.cpu.toL2Bus.slave[0] 150 151[system.cpu.icache.tags] 152type=LRU 153assoc=2 154block_size=64 155clk_domain=system.cpu_clk_domain 156eventq_index=0 157hit_latency=2 158sequential_access=false 159size=131072 160 161[system.cpu.interrupts] 162type=SparcInterrupts 163eventq_index=0 164 165[system.cpu.isa] 166type=SparcISA 167eventq_index=0 168 169[system.cpu.itb] 170type=SparcTLB 171eventq_index=0 172size=64 173 174[system.cpu.l2cache] 175type=Cache 176children=tags 177addr_ranges=0:18446744073709551615 178assoc=8 179clk_domain=system.cpu_clk_domain 180clusivity=mostly_incl 181demand_mshr_reserve=1 182eventq_index=0 183hit_latency=20 184is_read_only=false 185max_miss_count=0 186mshrs=20 187prefetch_on_access=false 188prefetcher=Null 189response_latency=20 190sequential_access=false 191size=2097152 192system=system 193tags=system.cpu.l2cache.tags 194tgts_per_mshr=12 195write_buffers=8 196writeback_clean=false 197cpu_side=system.cpu.toL2Bus.master[0] 198mem_side=system.membus.slave[1] 199 200[system.cpu.l2cache.tags] 201type=LRU 202assoc=8 203block_size=64 204clk_domain=system.cpu_clk_domain 205eventq_index=0 206hit_latency=20 207sequential_access=false 208size=2097152 209 210[system.cpu.toL2Bus] 211type=CoherentXBar 212children=snoop_filter 213clk_domain=system.cpu_clk_domain 214eventq_index=0 215forward_latency=0 216frontend_latency=1 217point_of_coherency=false 218response_latency=1 219snoop_filter=system.cpu.toL2Bus.snoop_filter 220snoop_response_latency=1 221system=system 222use_default_range=false 223width=32 224master=system.cpu.l2cache.cpu_side 225slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 226 227[system.cpu.toL2Bus.snoop_filter] 228type=SnoopFilter 229eventq_index=0 230lookup_latency=0 231max_capacity=8388608 232system=system 233 234[system.cpu.tracer] 235type=ExeTracer 236eventq_index=0 237 238[system.cpu.workload] 239type=LiveProcess 240cmd=twolf smred 241cwd=build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing 242drivers= 243egid=100 244env= 245errout=cerr 246euid=100 247eventq_index=0 248executable=/dist/m5/cpu2000/binaries/sparc/linux/twolf 249gid=100 250input=cin 251kvmInSE=false 252max_stack_size=67108864 253output=cout 254pid=100 255ppid=99 256simpoint=0 257system=system 258uid=100 259useArchPT=false 260 261[system.cpu_clk_domain] 262type=SrcClockDomain 263clock=500 264domain_id=-1 265eventq_index=0 266init_perf_level=0 267voltage_domain=system.voltage_domain 268 269[system.dvfs_handler] 270type=DVFSHandler 271domains= 272enable=false 273eventq_index=0 274sys_clk_domain=system.clk_domain 275transition_latency=100000000 276 277[system.membus] 278type=CoherentXBar 279clk_domain=system.clk_domain 280eventq_index=0 281forward_latency=4 282frontend_latency=3 283point_of_coherency=true 284response_latency=2 285snoop_filter=Null 286snoop_response_latency=4 287system=system 288use_default_range=false 289width=16 290master=system.physmem.port 291slave=system.system_port system.cpu.l2cache.mem_side 292 293[system.physmem] 294type=SimpleMemory 295bandwidth=73.000000 296clk_domain=system.clk_domain 297conf_table_reported=true 298eventq_index=0 299in_addr_map=true 300latency=30000 301latency_var=0 302null=false 303range=0:134217727 304port=system.membus.master[0] 305 306[system.voltage_domain] 307type=VoltageDomain 308eventq_index=0 309voltage=1.000000 310 311