config.ini revision 11268:8b4b55d79ddd
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26mmap_using_noreserve=false 27multi_thread=false 28num_work_ids=16 29readfile= 30symbolfile= 31work_begin_ckpt_count=0 32work_begin_cpu_id_exit=-1 33work_begin_exit_count=0 34work_cpus_ckpt_count=0 35work_end_ckpt_count=0 36work_end_exit_count=0 37work_item_id=-1 38system_port=system.membus.slave[0] 39 40[system.clk_domain] 41type=SrcClockDomain 42clock=1000 43domain_id=-1 44eventq_index=0 45init_perf_level=0 46voltage_domain=system.voltage_domain 47 48[system.cpu] 49type=TimingSimpleCPU 50children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 51branchPred=Null 52checker=Null 53clk_domain=system.cpu_clk_domain 54cpu_id=0 55do_checkpoint_insts=true 56do_quiesce=true 57do_statistics_insts=true 58dstage2_mmu=system.cpu.dstage2_mmu 59dtb=system.cpu.dtb 60eventq_index=0 61function_trace=false 62function_trace_start=0 63interrupts=system.cpu.interrupts 64isa=system.cpu.isa 65istage2_mmu=system.cpu.istage2_mmu 66itb=system.cpu.itb 67max_insts_all_threads=0 68max_insts_any_thread=0 69max_loads_all_threads=0 70max_loads_any_thread=0 71numThreads=1 72profile=0 73progress_interval=0 74simpoint_start_insts= 75socket_id=0 76switched_out=false 77system=system 78tracer=system.cpu.tracer 79workload=system.cpu.workload 80dcache_port=system.cpu.dcache.cpu_side 81icache_port=system.cpu.icache.cpu_side 82 83[system.cpu.dcache] 84type=Cache 85children=tags 86addr_ranges=0:18446744073709551615 87assoc=2 88clk_domain=system.cpu_clk_domain 89clusivity=mostly_incl 90demand_mshr_reserve=1 91eventq_index=0 92forward_snoops=true 93hit_latency=2 94is_read_only=false 95max_miss_count=0 96mshrs=4 97prefetch_on_access=false 98prefetcher=Null 99response_latency=2 100sequential_access=false 101size=262144 102system=system 103tags=system.cpu.dcache.tags 104tgts_per_mshr=20 105write_buffers=8 106writeback_clean=false 107cpu_side=system.cpu.dcache_port 108mem_side=system.cpu.toL2Bus.slave[1] 109 110[system.cpu.dcache.tags] 111type=LRU 112assoc=2 113block_size=64 114clk_domain=system.cpu_clk_domain 115eventq_index=0 116hit_latency=2 117sequential_access=false 118size=262144 119 120[system.cpu.dstage2_mmu] 121type=ArmStage2MMU 122children=stage2_tlb 123eventq_index=0 124stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 125sys=system 126tlb=system.cpu.dtb 127 128[system.cpu.dstage2_mmu.stage2_tlb] 129type=ArmTLB 130children=walker 131eventq_index=0 132is_stage2=true 133size=32 134walker=system.cpu.dstage2_mmu.stage2_tlb.walker 135 136[system.cpu.dstage2_mmu.stage2_tlb.walker] 137type=ArmTableWalker 138clk_domain=system.cpu_clk_domain 139eventq_index=0 140is_stage2=true 141num_squash_per_cycle=2 142sys=system 143 144[system.cpu.dtb] 145type=ArmTLB 146children=walker 147eventq_index=0 148is_stage2=false 149size=64 150walker=system.cpu.dtb.walker 151 152[system.cpu.dtb.walker] 153type=ArmTableWalker 154clk_domain=system.cpu_clk_domain 155eventq_index=0 156is_stage2=false 157num_squash_per_cycle=2 158sys=system 159port=system.cpu.toL2Bus.slave[3] 160 161[system.cpu.icache] 162type=Cache 163children=tags 164addr_ranges=0:18446744073709551615 165assoc=2 166clk_domain=system.cpu_clk_domain 167clusivity=mostly_incl 168demand_mshr_reserve=1 169eventq_index=0 170forward_snoops=true 171hit_latency=2 172is_read_only=true 173max_miss_count=0 174mshrs=4 175prefetch_on_access=false 176prefetcher=Null 177response_latency=2 178sequential_access=false 179size=131072 180system=system 181tags=system.cpu.icache.tags 182tgts_per_mshr=20 183write_buffers=8 184writeback_clean=true 185cpu_side=system.cpu.icache_port 186mem_side=system.cpu.toL2Bus.slave[0] 187 188[system.cpu.icache.tags] 189type=LRU 190assoc=2 191block_size=64 192clk_domain=system.cpu_clk_domain 193eventq_index=0 194hit_latency=2 195sequential_access=false 196size=131072 197 198[system.cpu.interrupts] 199type=ArmInterrupts 200eventq_index=0 201 202[system.cpu.isa] 203type=ArmISA 204decoderFlavour=Generic 205eventq_index=0 206fpsid=1090793632 207id_aa64afr0_el1=0 208id_aa64afr1_el1=0 209id_aa64dfr0_el1=1052678 210id_aa64dfr1_el1=0 211id_aa64isar0_el1=0 212id_aa64isar1_el1=0 213id_aa64mmfr0_el1=15728642 214id_aa64mmfr1_el1=0 215id_aa64pfr0_el1=17 216id_aa64pfr1_el1=0 217id_isar0=34607377 218id_isar1=34677009 219id_isar2=555950401 220id_isar3=17899825 221id_isar4=268501314 222id_isar5=0 223id_mmfr0=270536963 224id_mmfr1=0 225id_mmfr2=19070976 226id_mmfr3=34611729 227id_pfr0=49 228id_pfr1=4113 229midr=1091551472 230pmu=Null 231system=system 232 233[system.cpu.istage2_mmu] 234type=ArmStage2MMU 235children=stage2_tlb 236eventq_index=0 237stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 238sys=system 239tlb=system.cpu.itb 240 241[system.cpu.istage2_mmu.stage2_tlb] 242type=ArmTLB 243children=walker 244eventq_index=0 245is_stage2=true 246size=32 247walker=system.cpu.istage2_mmu.stage2_tlb.walker 248 249[system.cpu.istage2_mmu.stage2_tlb.walker] 250type=ArmTableWalker 251clk_domain=system.cpu_clk_domain 252eventq_index=0 253is_stage2=true 254num_squash_per_cycle=2 255sys=system 256 257[system.cpu.itb] 258type=ArmTLB 259children=walker 260eventq_index=0 261is_stage2=false 262size=64 263walker=system.cpu.itb.walker 264 265[system.cpu.itb.walker] 266type=ArmTableWalker 267clk_domain=system.cpu_clk_domain 268eventq_index=0 269is_stage2=false 270num_squash_per_cycle=2 271sys=system 272port=system.cpu.toL2Bus.slave[2] 273 274[system.cpu.l2cache] 275type=Cache 276children=tags 277addr_ranges=0:18446744073709551615 278assoc=8 279clk_domain=system.cpu_clk_domain 280clusivity=mostly_incl 281demand_mshr_reserve=1 282eventq_index=0 283forward_snoops=true 284hit_latency=20 285is_read_only=false 286max_miss_count=0 287mshrs=20 288prefetch_on_access=false 289prefetcher=Null 290response_latency=20 291sequential_access=false 292size=2097152 293system=system 294tags=system.cpu.l2cache.tags 295tgts_per_mshr=12 296write_buffers=8 297writeback_clean=false 298cpu_side=system.cpu.toL2Bus.master[0] 299mem_side=system.membus.slave[1] 300 301[system.cpu.l2cache.tags] 302type=LRU 303assoc=8 304block_size=64 305clk_domain=system.cpu_clk_domain 306eventq_index=0 307hit_latency=20 308sequential_access=false 309size=2097152 310 311[system.cpu.toL2Bus] 312type=CoherentXBar 313children=snoop_filter 314clk_domain=system.cpu_clk_domain 315eventq_index=0 316forward_latency=0 317frontend_latency=1 318response_latency=1 319snoop_filter=system.cpu.toL2Bus.snoop_filter 320snoop_response_latency=1 321system=system 322use_default_range=false 323width=32 324master=system.cpu.l2cache.cpu_side 325slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 326 327[system.cpu.toL2Bus.snoop_filter] 328type=SnoopFilter 329eventq_index=0 330lookup_latency=0 331max_capacity=8388608 332system=system 333 334[system.cpu.tracer] 335type=ExeTracer 336eventq_index=0 337 338[system.cpu.workload] 339type=LiveProcess 340cmd=twolf smred 341cwd=build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing 342drivers= 343egid=100 344env= 345errout=cerr 346euid=100 347eventq_index=0 348executable=/dist/m5/cpu2000/binaries/arm/linux/twolf 349gid=100 350input=cin 351kvmInSE=false 352max_stack_size=67108864 353output=cout 354pid=100 355ppid=99 356simpoint=0 357system=system 358uid=100 359useArchPT=false 360 361[system.cpu_clk_domain] 362type=SrcClockDomain 363clock=500 364domain_id=-1 365eventq_index=0 366init_perf_level=0 367voltage_domain=system.voltage_domain 368 369[system.dvfs_handler] 370type=DVFSHandler 371domains= 372enable=false 373eventq_index=0 374sys_clk_domain=system.clk_domain 375transition_latency=100000000 376 377[system.membus] 378type=CoherentXBar 379clk_domain=system.clk_domain 380eventq_index=0 381forward_latency=4 382frontend_latency=3 383response_latency=2 384snoop_filter=Null 385snoop_response_latency=4 386system=system 387use_default_range=false 388width=16 389master=system.physmem.port 390slave=system.system_port system.cpu.l2cache.mem_side 391 392[system.physmem] 393type=SimpleMemory 394bandwidth=73.000000 395clk_domain=system.clk_domain 396conf_table_reported=true 397eventq_index=0 398in_addr_map=true 399latency=30000 400latency_var=0 401null=false 402range=0:134217727 403port=system.membus.master[0] 404 405[system.voltage_domain] 406type=VoltageDomain 407eventq_index=0 408voltage=1.000000 409 410