config.ini revision 11219
19885SN/A[root] 29885SN/Atype=Root 39885SN/Achildren=system 410036SN/Aeventq_index=0 59885SN/Afull_system=false 610036SN/Asim_quantum=0 79885SN/Atime_sync_enable=false 89885SN/Atime_sync_period=100000000000 99885SN/Atime_sync_spin_threshold=100000000 109885SN/A 119885SN/A[system] 129885SN/Atype=System 1310315Snilay@cs.wisc.educhildren=clk_domain cpu dvfs_handler membus monitor physmem 149885SN/Aboot_osflags=a 159885SN/Acache_line_size=64 169885SN/Aclk_domain=system.clk_domain 1710036SN/Aeventq_index=0 189885SN/Ainit_param=0 199885SN/Akernel= 2010315Snilay@cs.wisc.edukernel_addr_check=true 219885SN/Aload_addr_mask=1099511627775 2210315Snilay@cs.wisc.eduload_offset=0 239885SN/Amem_mode=timing 249885SN/Amem_ranges= 259885SN/Amemories=system.physmem 2610736Snilay@cs.wisc.edummap_using_noreserve=false 2711219Snilay@cs.wisc.edumulti_thread=false 289885SN/Anum_work_ids=16 299885SN/Areadfile= 309885SN/Asymbolfile= 319885SN/Awork_begin_ckpt_count=0 329885SN/Awork_begin_cpu_id_exit=-1 339885SN/Awork_begin_exit_count=0 349885SN/Awork_cpus_ckpt_count=0 359885SN/Awork_end_ckpt_count=0 369885SN/Awork_end_exit_count=0 379885SN/Awork_item_id=-1 389885SN/Asystem_port=system.membus.slave[1] 399885SN/A 409885SN/A[system.clk_domain] 419885SN/Atype=SrcClockDomain 429885SN/Achildren=voltage_domain 439885SN/Aclock=1000 4410315Snilay@cs.wisc.edudomain_id=-1 4510036SN/Aeventq_index=0 4610315Snilay@cs.wisc.eduinit_perf_level=0 479885SN/Avoltage_domain=system.clk_domain.voltage_domain 489885SN/A 499885SN/A[system.clk_domain.voltage_domain] 509885SN/Atype=VoltageDomain 5110036SN/Aeventq_index=0 529885SN/Avoltage=1.000000 539885SN/A 549885SN/A[system.cpu] 559885SN/Atype=TrafficGen 569885SN/Aclk_domain=system.clk_domain 5710315Snilay@cs.wisc.educonfig_file=tests/quick/se/70.tgen/tgen-dram-ctrl.cfg 589885SN/Aelastic_req=false 5910036SN/Aeventq_index=0 609885SN/Asystem=system 619885SN/Aport=system.monitor.slave 629885SN/A 6310315Snilay@cs.wisc.edu[system.dvfs_handler] 6410315Snilay@cs.wisc.edutype=DVFSHandler 6510315Snilay@cs.wisc.edudomains= 6610315Snilay@cs.wisc.eduenable=false 6710315Snilay@cs.wisc.edueventq_index=0 6810315Snilay@cs.wisc.edusys_clk_domain=system.clk_domain 6910315Snilay@cs.wisc.edutransition_latency=100000000 7010315Snilay@cs.wisc.edu 719885SN/A[system.membus] 7210451Snilay@cs.wisc.edutype=NoncoherentXBar 739885SN/Aclk_domain=system.clk_domain 7410036SN/Aeventq_index=0 7510736Snilay@cs.wisc.eduforward_latency=1 7610736Snilay@cs.wisc.edufrontend_latency=2 7710736Snilay@cs.wisc.eduresponse_latency=2 789885SN/Ause_default_range=false 799885SN/Awidth=16 809885SN/Amaster=system.physmem.port 819885SN/Aslave=system.monitor.master system.system_port 829885SN/A 839885SN/A[system.monitor] 849885SN/Atype=CommMonitor 859885SN/Abandwidth_bins=20 869885SN/Aburst_length_bins=20 879885SN/Aclk_domain=system.clk_domain 889885SN/Adisable_addr_dists=true 899885SN/Adisable_bandwidth_hists=false 909885SN/Adisable_burst_length_hists=false 919885SN/Adisable_itt_dists=false 929885SN/Adisable_latency_hists=false 939885SN/Adisable_outstanding_hists=false 949885SN/Adisable_transaction_hists=false 9510036SN/Aeventq_index=0 969885SN/Aitt_bins=20 979885SN/Aitt_max_bin=100000 989885SN/Alatency_bins=20 999885SN/Aoutstanding_bins=20 1009885SN/Aread_addr_mask=18446744073709551615 1019885SN/Asample_period=1000000000 10210315Snilay@cs.wisc.edusystem=system 1039885SN/Atransaction_bins=20 1049885SN/Awrite_addr_mask=18446744073709551615 1059885SN/Amaster=system.membus.slave[0] 1069885SN/Aslave=system.cpu.port 1079885SN/A 1089885SN/A[system.physmem] 10910315Snilay@cs.wisc.edutype=DRAMCtrl 11010451Snilay@cs.wisc.eduIDD0=0.075000 11110451Snilay@cs.wisc.eduIDD02=0.000000 11210451Snilay@cs.wisc.eduIDD2N=0.050000 11310451Snilay@cs.wisc.eduIDD2N2=0.000000 11410451Snilay@cs.wisc.eduIDD2P0=0.000000 11510451Snilay@cs.wisc.eduIDD2P02=0.000000 11610451Snilay@cs.wisc.eduIDD2P1=0.000000 11710451Snilay@cs.wisc.eduIDD2P12=0.000000 11810451Snilay@cs.wisc.eduIDD3N=0.057000 11910451Snilay@cs.wisc.eduIDD3N2=0.000000 12010451Snilay@cs.wisc.eduIDD3P0=0.000000 12110451Snilay@cs.wisc.eduIDD3P02=0.000000 12210451Snilay@cs.wisc.eduIDD3P1=0.000000 12310451Snilay@cs.wisc.eduIDD3P12=0.000000 12410451Snilay@cs.wisc.eduIDD4R=0.187000 12510451Snilay@cs.wisc.eduIDD4R2=0.000000 12610451Snilay@cs.wisc.eduIDD4W=0.165000 12710451Snilay@cs.wisc.eduIDD4W2=0.000000 12810451Snilay@cs.wisc.eduIDD5=0.220000 12910451Snilay@cs.wisc.eduIDD52=0.000000 13010451Snilay@cs.wisc.eduIDD6=0.000000 13110451Snilay@cs.wisc.eduIDD62=0.000000 13210451Snilay@cs.wisc.eduVDD=1.500000 13310451Snilay@cs.wisc.eduVDD2=0.000000 1349885SN/Aactivation_limit=4 13510736Snilay@cs.wisc.eduaddr_mapping=RoRaBaCoCh 13610451Snilay@cs.wisc.edubank_groups_per_rank=0 1379885SN/Abanks_per_rank=8 1389885SN/Aburst_length=8 1399885SN/Achannels=1 1409885SN/Aclk_domain=system.clk_domain 1419885SN/Aconf_table_reported=true 1429885SN/Adevice_bus_width=8 1439885SN/Adevice_rowbuffer_size=1024 14410736Snilay@cs.wisc.edudevice_size=536870912 1459885SN/Adevices_per_rank=8 14610451Snilay@cs.wisc.edudll=true 14710036SN/Aeventq_index=0 1489885SN/Ain_addr_map=true 14910315Snilay@cs.wisc.edumax_accesses_per_row=16 1509885SN/Amem_sched_policy=frfcfs 15110315Snilay@cs.wisc.edumin_writes_per_switch=16 1529885SN/Anull=false 15310315Snilay@cs.wisc.edupage_policy=open_adaptive 1549885SN/Arange=0:134217727 1559885SN/Aranks_per_channel=2 1569885SN/Aread_buffer_size=32 1579885SN/Astatic_backend_latency=10000 1589885SN/Astatic_frontend_latency=10000 1599885SN/AtBURST=5000 16010451Snilay@cs.wisc.edutCCD_L=0 16110315Snilay@cs.wisc.edutCK=1250 1629885SN/AtCL=13750 16310451Snilay@cs.wisc.edutCS=2500 16410036SN/AtRAS=35000 1659885SN/AtRCD=13750 1669885SN/AtREFI=7800000 16710315Snilay@cs.wisc.edutRFC=260000 1689885SN/AtRP=13750 16910315Snilay@cs.wisc.edutRRD=6000 17010451Snilay@cs.wisc.edutRRD_L=0 17110315Snilay@cs.wisc.edutRTP=7500 17210315Snilay@cs.wisc.edutRTW=2500 17310315Snilay@cs.wisc.edutWR=15000 1749885SN/AtWTR=7500 17510315Snilay@cs.wisc.edutXAW=30000 17610451Snilay@cs.wisc.edutXP=0 17710451Snilay@cs.wisc.edutXPDLL=0 17810451Snilay@cs.wisc.edutXS=0 17910451Snilay@cs.wisc.edutXSDLL=0 18010315Snilay@cs.wisc.eduwrite_buffer_size=64 18110315Snilay@cs.wisc.eduwrite_high_thresh_perc=85 18210315Snilay@cs.wisc.eduwrite_low_thresh_perc=50 1839885SN/Aport=system.membus.master[0] 1849885SN/A 185